From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=49207 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PBM3z-0002bm-4O for qemu-devel@nongnu.org; Thu, 28 Oct 2010 02:34:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PBM3y-00088B-6n for qemu-devel@nongnu.org; Thu, 28 Oct 2010 02:34:14 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38161) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PBM3x-000882-VN for qemu-devel@nongnu.org; Thu, 28 Oct 2010 02:34:14 -0400 Date: Thu, 28 Oct 2010 08:33:55 +0200 From: "Michael S. Tsirkin" Message-ID: <20101028063355.GA7707@redhat.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Subject: [Qemu-devel] Re: [PATCH v2 2/2] pciinit: use pci_region functions. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Isaku Yamahata Cc: cam@cs.ualberta.ca, seabios@seabios.org, adnan@khaleel.us, qemu-devel@nongnu.org As a sepaate note, BIOS currently seems to allocate regions in-order, correct? A classical trick is to allocate regions behind each bridge in the reverse order of their size. This avoids holes due to alignment. -- MST