From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=37161 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PGxhW-0004Rl-0B for qemu-devel@nongnu.org; Fri, 12 Nov 2010 12:46:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PGxhU-0004Ym-O7 for qemu-devel@nongnu.org; Fri, 12 Nov 2010 12:46:13 -0500 Received: from mx1.redhat.com ([209.132.183.28]:57794) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PGxhU-0004YT-Ge for qemu-devel@nongnu.org; Fri, 12 Nov 2010 12:46:12 -0500 From: Alex Williamson Date: Fri, 12 Nov 2010 10:46:10 -0700 Message-ID: <20101112174600.3169.62263.stgit@s20.home> In-Reply-To: <20101112173929.3169.47618.stgit@s20.home> References: <20101112173929.3169.47618.stgit@s20.home> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH v2 1/9] pci: pci_default_cap_write_config ignores wmask List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: kvm@vger.kernel.org, mst@redhat.com Cc: chrisw@redhat.com, alex.williamson@redhat.com, qemu-devel@nongnu.org Make use of wmask, just like the rest of config space. Signed-off-by: Alex Williamson --- hw/pci.c | 22 ++++++++++------------ 1 files changed, 10 insertions(+), 12 deletions(-) diff --git a/hw/pci.c b/hw/pci.c index 92aaa85..4bc5882 100644 --- a/hw/pci.c +++ b/hw/pci.c @@ -1175,13 +1175,15 @@ uint32_t pci_default_read_config(PCIDevice *d, return pci_read_config(d, address, len); } -static void pci_write_config(PCIDevice *pci_dev, - uint32_t address, uint32_t val, int len) +static void pci_write_config_with_mask(PCIDevice *d, uint32_t addr, + uint32_t val, int l) { int i; - for (i = 0; i < len; i++) { - pci_dev->config[address + i] = val & 0xff; - val >>= 8; + uint32_t config_size = pci_config_size(d); + + for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) { + uint8_t wmask = d->wmask[addr + i]; + d->config[addr + i] = (d->config[addr + i] & ~wmask) | (val & wmask); } } @@ -1202,23 +1204,19 @@ uint32_t pci_default_cap_read_config(PCIDevice *pci_dev, void pci_default_cap_write_config(PCIDevice *pci_dev, uint32_t address, uint32_t val, int len) { - pci_write_config(pci_dev, address, val, len); + pci_write_config_with_mask(pci_dev, address, val, len); } void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l) { - int i, was_irq_disabled = pci_irq_disabled(d); - uint32_t config_size = pci_config_size(d); + int was_irq_disabled = pci_irq_disabled(d); if (pci_access_cap_config(d, addr, l)) { d->cap.config_write(d, addr, val, l); return; } - for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) { - uint8_t wmask = d->wmask[addr + i]; - d->config[addr + i] = (d->config[addr + i] & ~wmask) | (val & wmask); - } + pci_write_config_with_mask(d, addr, val, l); #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT if (kvm_enabled() && kvm_irqchip_in_kernel() &&