From mboxrd@z Thu Jan  1 00:00:00 1970
Received: from [140.186.70.92] (port=45340 helo=eggs.gnu.org)
	by lists.gnu.org with esmtp (Exim 4.43) id 1PIyiS-00015Y-Qi
	for qemu-devel@nongnu.org; Thu, 18 Nov 2010 02:15:33 -0500
Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)
	(envelope-from <mst@redhat.com>) id 1PIyiR-0006Ay-UT
	for qemu-devel@nongnu.org; Thu, 18 Nov 2010 02:15:32 -0500
Received: from mx1.redhat.com ([209.132.183.28]:2874)
	by eggs.gnu.org with esmtp (Exim 4.71)
	(envelope-from <mst@redhat.com>) id 1PIyiR-0006At-Mq
	for qemu-devel@nongnu.org; Thu, 18 Nov 2010 02:15:31 -0500
Date: Thu, 18 Nov 2010 09:15:19 +0200
From: "Michael S. Tsirkin" <mst@redhat.com>
Message-ID: <20101118071519.GA15472@redhat.com>
References: <20101116172141.GA4077@redhat.com>
	<C9081994.3517C%anjali@juniper.net>
	<20101117105843.GB10168@redhat.com>
	<20101118030918.GA18102@valinux.co.jp>
	<20101118064643.GD8731@redhat.com>
	<20101118070934.GP18102@valinux.co.jp>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <20101118070934.GP18102@valinux.co.jp>
Subject: [Qemu-devel] Re: Hitting 29 NIC limit
List-Id: qemu-devel.nongnu.org
List-Unsubscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>
List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel>
List-Post: <mailto:qemu-devel@nongnu.org>
List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help>
List-Subscribe: <http://lists.nongnu.org/mailman/listinfo/qemu-devel>,
	<mailto:qemu-devel-request@nongnu.org?subject=subscribe>
To: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Anjali Kulkarni <anjali@juniper.net>, qemu-devel@nongnu.org

On Thu, Nov 18, 2010 at 04:09:34PM +0900, Isaku Yamahata wrote:
> On Thu, Nov 18, 2010 at 08:46:43AM +0200, Michael S. Tsirkin wrote:
> > > What is missing for multiple pci buses is
> > > - a new PC machine description which has multiple pci buses
> > >   My Q35 chipset patch will provide this.
> > 
> > IMHO, what we really need is a way to specify bridges
> > through qdev. Not a machine with a hard-coded buses.
> 
> Yes, it's long-term goal.
> 
> 
> > The firmware paths used by Gleb's code might supply
> > a good syntax to specify topology.
> > 
> > > - a simple P2P bridge emulator for pc architecture
> > > - seabios support
> > >   - DSDT for a new machine which has multi pci buses(IRQ routing)
> > >   - pv pci bus numbering
> > 
> > Interesting. What's the motivation for this?
> 
> For hot-plugging pci-to-pci bridge. It requires sparse pci bus numbering.

Not sure I understand. pci bus numbering should be
completely up to the guest.

> In fact, it's not so strong requirement.
> Possibly I would have to dig into dsdt.

Yes, some guest-side technology like acpi might be needed.

> -- 
> yamahata