From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=47770 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PJ2vQ-0007hh-ED for qemu-devel@nongnu.org; Thu, 18 Nov 2010 06:45:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PJ2vO-0001eu-Uo for qemu-devel@nongnu.org; Thu, 18 Nov 2010 06:45:12 -0500 Received: from mx1.redhat.com ([209.132.183.28]:6401) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PJ2vO-0001ep-Mo for qemu-devel@nongnu.org; Thu, 18 Nov 2010 06:45:10 -0500 Date: Thu, 18 Nov 2010 13:45:04 +0200 From: Gleb Natapov Message-ID: <20101118114504.GI7948@redhat.com> References: <1289749181-12070-16-git-send-email-gleb@redhat.com> <20101115084242.GG7948@redhat.com> <20101116141112.GS7948@redhat.com> <20101116190246.GA27851@redhat.com> <20101118101827.GC7948@redhat.com> <20101118113831.GD31261@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=koi8-r Content-Disposition: inline Content-Transfer-Encoding: quoted-printable In-Reply-To: <20101118113831.GD31261@redhat.com> Subject: [Qemu-devel] Re: [PATCHv4 15/15] Pass boot device list to firmware. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: kvm@vger.kernel.org, qemu-devel@nongnu.org, armbru@redhat.com, Blue Swirl , alex.williamson@redhat.com, kevin@koconnor.net On Thu, Nov 18, 2010 at 01:38:31PM +0200, Michael S. Tsirkin wrote: > On Thu, Nov 18, 2010 at 12:18:27PM +0200, Gleb Natapov wrote: > > On Wed, Nov 17, 2010 at 09:54:27PM +0000, Blue Swirl wrote: > > > 2010/11/16 Gleb Natapov : > > > > On Tue, Nov 16, 2010 at 06:30:19PM +0000, Blue Swirl wrote: > > > >> >> Perhaps the FW path should use device class names if no name is= specified. > > > >> > What do you mean by "device class name". We can do something lik= e this: > > > >> > if (dev->child_bus.lh_first) > > > >> > =9A =9A =9A =9Areturn dev->child_bus.lh_first->info->name; > > > >> > > > > >> > i.e if there is child bus use its bus name as fw name. This will= make > > > >> > all pci devices to have "pci" as fw name automatically. The prob= lem is > > > >> > that theoretically same device can provide different buses. > > > >> > > > >> I meant PCI class name, like "display" for display controllers, > > > >> "network" for NICs etc. > > > >> > > > > That is what my pci bus related patch is doing already. > > > > > > > >> >> I'll try Sparc32 to see how this fits there. > > > >> > > > >> Except bootindex is not implemented for SCSI. > > > > Will look into adding it. > > >=20 > > > Thanks. The bootindex on Sparc32 looks like this: > > > bootindex /esp@0000000078800000/disk@1,0 > > > /ethernet@ffffffffffffffff/ethernet-phy@0 > > >=20 > > For arches other then x86 there is a lot of work left to be done :) > > For starter exotic sparc buses should get their own get_fw_dev_path() > > implementation. > >=20 > > > I don't think I got Lance setup right. > > >=20 > > > OF paths for the devices would be: > > > /iommu@0,10000000/sbus@0,10001000/espdma@5,8400000/esp@5,8800000/sd@1= ,0 > > > /iommu@0,10000000/sbus@0,10001000/ledma@5,8400010/le@5,8c00000 > > If qdev hierarchy does not correspond to real HW there is no much we can > > do expect for fixing qdev. >=20 > That's bad. This raises a concern: if these paths expose qdev > internals, any attempt to fix this will break migration. >=20 The path expose internal HW hierarchy. It is designed to do so. Qdev designed to do the same: describe HW hierarchy. If qdev fails to do so it is broken. I do not see connection to migration at all since the path is not used in migration code. > > >=20 > > > The logic for ESP is that ESP (registers at 0x78800000, slot offset > > > 0x880000) is handled by the DMA controller (registers at 0x78400000, > > > slot offset 0x840000), they are in a SBus slot #5, and SBus (registers > > > at 0x10001000) is in turn handled by IOMMU (registers at 0x10000000). > > > Lance should be handled the same way. > > >=20 > > > This hierarchy is partly known by QEMU because DMA accesses use this > > > flow, but not otherwise. There is no concept of SBus slots, DMA talks > > > to IOMMU directly. Though in this case both ESP, Lance and their DMA > > > controllers are on board devices in a MACIO chip. It may be possible > > > to add the hierarchy information at each stage. > > >=20 > > > It should also be possible for BIOS to determine the device just from > > > the physical address if we ignored OF compatibility. > > It would be nice to be OF compatible at least at some level. Of course = OF > > spec is not strict enough to have two different implementations produce > > exactly same device path that can be compared by strcpy. Can we apply > > the series now? At least for x86 it provides useful paths and work can > > be continue for other arches by interested parties. > >=20 > > -- > > Gleb. >=20 > Something I only now realized is that we commit > to never changing the paths for any architecture > that supports migration. >=20 No connection to migration whatsoever. -- Gleb.