From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=47991 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PJ3Wc-00044o-Tn for qemu-devel@nongnu.org; Thu, 18 Nov 2010 07:23:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PJ3Wb-00013T-N7 for qemu-devel@nongnu.org; Thu, 18 Nov 2010 07:23:38 -0500 Received: from mx1.redhat.com ([209.132.183.28]:26454) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PJ3Wb-000130-A8 for qemu-devel@nongnu.org; Thu, 18 Nov 2010 07:23:37 -0500 Date: Thu, 18 Nov 2010 14:23:20 +0200 From: "Michael S. Tsirkin" Message-ID: <20101118122320.GC31987@redhat.com> References: <20101116141112.GS7948@redhat.com> <20101116190246.GA27851@redhat.com> <20101118101827.GC7948@redhat.com> <20101118113831.GD31261@redhat.com> <20101118114504.GI7948@redhat.com> <20101118115230.GE31261@redhat.com> <20101118121605.GK7948@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline In-Reply-To: <20101118121605.GK7948@redhat.com> Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] Re: [PATCHv4 15/15] Pass boot device list to firmware. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Gleb Natapov Cc: kvm@vger.kernel.org, qemu-devel@nongnu.org, armbru@redhat.com, Blue Swirl , alex.williamson@redhat.com, kevin@koconnor.net On Thu, Nov 18, 2010 at 02:16:05PM +0200, Gleb Natapov wrote: > On Thu, Nov 18, 2010 at 01:52:30PM +0200, Michael S. Tsirkin wrote: > > On Thu, Nov 18, 2010 at 01:45:04PM +0200, Gleb Natapov wrote: > > > On Thu, Nov 18, 2010 at 01:38:31PM +0200, Michael S. Tsirkin wrote: > > > > On Thu, Nov 18, 2010 at 12:18:27PM +0200, Gleb Natapov wrote: > > > > > On Wed, Nov 17, 2010 at 09:54:27PM +0000, Blue Swirl wrote: > > > > > > 2010/11/16 Gleb Natapov : > > > > > > > On Tue, Nov 16, 2010 at 06:30:19PM +0000, Blue Swirl wrote: > > > > > > >> >> Perhaps the FW path should use device class names if no= name is specified. > > > > > > >> > What do you mean by "device class name". We can do somet= hing like this: > > > > > > >> > if (dev->child_bus.lh_first) > > > > > > >> > =A0 =A0 =A0 =A0return dev->child_bus.lh_first->info->nam= e; > > > > > > >> > > > > > > > >> > i.e if there is child bus use its bus name as fw name. T= his will make > > > > > > >> > all pci devices to have "pci" as fw name automatically. = The problem is > > > > > > >> > that theoretically same device can provide different bus= es. > > > > > > >> > > > > > > >> I meant PCI class name, like "display" for display control= lers, > > > > > > >> "network" for NICs etc. > > > > > > >> > > > > > > > That is what my pci bus related patch is doing already. > > > > > > > > > > > > > >> >> I'll try Sparc32 to see how this fits there. > > > > > > >> > > > > > > >> Except bootindex is not implemented for SCSI. > > > > > > > Will look into adding it. > > > > > >=20 > > > > > > Thanks. The bootindex on Sparc32 looks like this: > > > > > > bootindex /esp@0000000078800000/disk@1,0 > > > > > > /ethernet@ffffffffffffffff/ethernet-phy@0 > > > > > >=20 > > > > > For arches other then x86 there is a lot of work left to be don= e :) > > > > > For starter exotic sparc buses should get their own get_fw_dev_= path() > > > > > implementation. > > > > >=20 > > > > > > I don't think I got Lance setup right. > > > > > >=20 > > > > > > OF paths for the devices would be: > > > > > > /iommu@0,10000000/sbus@0,10001000/espdma@5,8400000/esp@5,8800= 000/sd@1,0 > > > > > > /iommu@0,10000000/sbus@0,10001000/ledma@5,8400010/le@5,8c0000= 0 > > > > > If qdev hierarchy does not correspond to real HW there is no mu= ch we can > > > > > do expect for fixing qdev. > > > >=20 > > > > That's bad. This raises a concern: if these paths expose qdev > > > > internals, any attempt to fix this will break migration. > > > >=20 > > > The path expose internal HW hierarchy. It is designed to do so. Qde= v > > > designed to do the same: describe HW hierarchy. If qdev fails to do= so it > > > is broken. > >=20 > > Yes. But since you use qdev to build up the path, a broken > > qdev will give you a broken path. > >=20 > Qdev bug. Fix it like any other bug. The nice is that when you compare > device path produced by qdev and real HW you can see when qdev is wrong. >=20 > > > I do not see connection to migration at all since the path is > > > not used in migration code. > >=20 > > The connection is that if we pass the list with path 1 which you defi= ne > > as broken to BIOS, then migrate to a machine with an updated qemu > > which has a correct path, BIOS won't be able to complete the boot. > You solve it like you solve all such issue with -M machine type. So that's unavoidable if we think paths are correct. But if we know they are wrong, we are better off correcting them first IMO. > But the problem exists only if migration happens in a short window > between start of the boot process and BIOS reading boot order string. > After reboot new qemu should have new BIOS. That makes it even more nasty, doesn't it? > > Right? Same in reverse direction. > Reverse direction is not and never was supported. >=20 > > As solution could be a fuzzy matching > > of paths that wiull let us recover. > >=20 > Firmware can try its best of course, but nothing is guarantied. No I mean qemu could do matching fuzzily. This way if we get a path from the old BIOS we can survive. > > > > > >=20 > > > > > > The logic for ESP is that ESP (registers at 0x78800000, slot = offset > > > > > > 0x880000) is handled by the DMA controller (registers at 0x78= 400000, > > > > > > slot offset 0x840000), they are in a SBus slot #5, and SBus (= registers > > > > > > at 0x10001000) is in turn handled by IOMMU (registers at 0x10= 000000). > > > > > > Lance should be handled the same way. > > > > > >=20 > > > > > > This hierarchy is partly known by QEMU because DMA accesses u= se this > > > > > > flow, but not otherwise. There is no concept of SBus slots, D= MA talks > > > > > > to IOMMU directly. Though in this case both ESP, Lance and th= eir DMA > > > > > > controllers are on board devices in a MACIO chip. It may be p= ossible > > > > > > to add the hierarchy information at each stage. > > > > > >=20 > > > > > > It should also be possible for BIOS to determine the device j= ust from > > > > > > the physical address if we ignored OF compatibility. > > > > > It would be nice to be OF compatible at least at some level. Of= course OF > > > > > spec is not strict enough to have two different implementations= produce > > > > > exactly same device path that can be compared by strcpy. Can w= e apply > > > > > the series now? At least for x86 it provides useful paths and w= ork can > > > > > be continue for other arches by interested parties. > > > > >=20 > > > > > -- > > > > > Gleb. > > > >=20 > > > > Something I only now realized is that we commit > > > > to never changing the paths for any architecture > > > > that supports migration. > > > >=20 > > > No connection to migration whatsoever. > >=20 > > It just seems silly to use different paths for the same thing. > >=20 > > Besides the connection above, I was hoping to use these paths > > for section names in migration. If we can't guarantee they are > > stable, we'll have to roll our own, and if we do this, > > with stability guarantees required for migration format, > > maybe use it for other things like BIOS as well? > >=20 > It doesn't matter what do you use for migration purposes as long as it > depend on qdev hierarchy it will have problem when qdev hierarchy > changes and if it doesn't you can't produce unique names reliably. >=20 > -- > Gleb. We can, it's not like OF is the only way to enumerate. We could have driver-specific paths for example, exactly like we currently have. I.e. paths don't have to be globally unique because each driver has it's own domain. It seems cleaner to use an existing spec but we must figure out how it will not become a support issue. --=20 MST