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From: Paul Brook <paul@codesourcery.com>
Subject: Re: [Qemu-devel] [PATCH 01/15] exec: introduce endianness swapped mmio
Date: Sat, 27 Nov 2010 10:24:00 +0000
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To: Blue Swirl <blauwirbel@gmail.com>
Cc: Andreas =?utf-8?q?F=C3=A4rber?= <andreas.faerber@web.de>, Alexander Graf <agraf@suse.de>, QEMU-devel Developers <qemu-devel@nongnu.org>

> > Switching endianness of a CPU generally does not effect the endianness of
> > the CPU/peripheral busses.  It makes the CPU byteswap accesses before
> > they are seen by either memory or devices.
> > 
> > In theory it might be possible to avoid redundant byteswaps if you're
> > really clever.  In practice you still have to handle the fact that your
> > devices are a different endianness to RAM, so it probably doesn't gain
> > you a whole lot.
> 
> Sparc64 MMU can also perform byte swapping, there is also a byte
> swapping CPU mode and byte swapping access instructions. I think only
> the instructions are used (for PCI).

Right, but that is (to a large extent) a separate problem from memory mapped 
peripherals.  You still have to handle the case where a single TLB entry 
covers both ram and a cross-endian device.

Paul