From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=42918 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PN77E-0000Hy-2Y for qemu-devel@nongnu.org; Mon, 29 Nov 2010 12:02:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PN77C-0000I7-Tv for qemu-devel@nongnu.org; Mon, 29 Nov 2010 12:02:11 -0500 Received: from mail.codesourcery.com ([38.113.113.100]:35909) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PN77C-0000I2-Ja for qemu-devel@nongnu.org; Mon, 29 Nov 2010 12:02:10 -0500 Date: Mon, 29 Nov 2010 09:02:09 -0800 From: Nathan Froyd Subject: Re: [Qemu-devel] [PATCH 09/12] ARM: Ignore top 16 bits when doing VCVT from 16 bit fixed point Message-ID: <20101129170209.GD8544@codesourcery.com> References: <1290538431-13170-1-git-send-email-peter.maydell@linaro.org> <1290538431-13170-10-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1290538431-13170-10-git-send-email-peter.maydell@linaro.org> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: qemu-devel@nongnu.org On Tue, Nov 23, 2010 at 06:53:48PM +0000, Peter Maydell wrote: > VCVT of 16 bit fixed point to float should ignore the top 16 bits > of the source register. Cast to int16_t and friends rather than > int16 -- the former is guaranteed exactly 16 bits wide where the > latter is merely at least 16 bits wide (and so is usually 32 bits). > > Signed-off-by: Peter Maydell Reviewed-by: Nathan Froyd -Nathan