From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=49426 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PaF0D-0001u1-6G for qemu-devel@nongnu.org; Tue, 04 Jan 2011 17:05:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PaF0B-0006Y2-SK for qemu-devel@nongnu.org; Tue, 04 Jan 2011 17:05:12 -0500 Received: from hall.aurel32.net ([88.191.126.93]:33663) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PaF0B-0006Xw-Lj for qemu-devel@nongnu.org; Tue, 04 Jan 2011 17:05:11 -0500 Date: Tue, 4 Jan 2011 23:05:06 +0100 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH 2/2] ARM: Fix decoding of VQSHL/VQSHLU immediate forms Message-ID: <20110104220506.GC15256@volta.aurel32.net> References: <1294071648-2182-1-git-send-email-peter.maydell@linaro.org> <1294071648-2182-3-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <1294071648-2182-3-git-send-email-peter.maydell@linaro.org> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: qemu-devel@nongnu.org On Mon, Jan 03, 2011 at 04:20:48PM +0000, Peter Maydell wrote: > From: Juha Riihimäki > > Fix errors in the decoding of ARM VQSHL/VQSHLU immediate forms, > including using the new VQSHLU helper functions where appropriate. > > Signed-off-by: Peter Maydell Reviewed-by: Aurelien Jarno > --- > target-arm/translate.c | 51 +++++++++++++++++++++++++++++++++-------------- > 1 files changed, 36 insertions(+), 15 deletions(-) > > diff --git a/target-arm/translate.c b/target-arm/translate.c > index 2598268..1853b5c 100644 > --- a/target-arm/translate.c > +++ b/target-arm/translate.c > @@ -4647,14 +4647,22 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn) > case 5: /* VSHL, VSLI */ > gen_helper_neon_shl_u64(cpu_V0, cpu_V0, cpu_V1); > break; > - case 6: /* VQSHL */ > - if (u) > - gen_helper_neon_qshl_u64(cpu_V0, cpu_env, cpu_V0, cpu_V1); > - else > - gen_helper_neon_qshl_s64(cpu_V0, cpu_env, cpu_V0, cpu_V1); > + case 6: /* VQSHLU */ > + if (u) { > + gen_helper_neon_qshlu_s64(cpu_V0, cpu_env, > + cpu_V0, cpu_V1); > + } else { > + return 1; > + } > break; > - case 7: /* VQSHLU */ > - gen_helper_neon_qshl_u64(cpu_V0, cpu_env, cpu_V0, cpu_V1); > + case 7: /* VQSHL */ > + if (u) { > + gen_helper_neon_qshl_u64(cpu_V0, cpu_env, > + cpu_V0, cpu_V1); > + } else { > + gen_helper_neon_qshl_s64(cpu_V0, cpu_env, > + cpu_V0, cpu_V1); > + } > break; > } > if (op == 1 || op == 3) { > @@ -4693,17 +4701,30 @@ static int disas_neon_data_insn(CPUState * env, DisasContext *s, uint32_t insn) > default: return 1; > } > break; > - case 6: /* VQSHL */ > - GEN_NEON_INTEGER_OP_ENV(qshl); > - break; > - case 7: /* VQSHLU */ > + case 6: /* VQSHLU */ > + if (!u) { > + return 1; > + } > switch (size) { > - case 0: gen_helper_neon_qshl_u8(tmp, cpu_env, tmp, tmp2); break; > - case 1: gen_helper_neon_qshl_u16(tmp, cpu_env, tmp, tmp2); break; > - case 2: gen_helper_neon_qshl_u32(tmp, cpu_env, tmp, tmp2); break; > - default: return 1; > + case 0: > + gen_helper_neon_qshlu_s8(tmp, cpu_env, > + tmp, tmp2); > + break; > + case 1: > + gen_helper_neon_qshlu_s16(tmp, cpu_env, > + tmp, tmp2); > + break; > + case 2: > + gen_helper_neon_qshlu_s32(tmp, cpu_env, > + tmp, tmp2); > + break; > + default: > + return 1; > } > break; > + case 7: /* VQSHL */ > + GEN_NEON_INTEGER_OP_ENV(qshl); > + break; > } > dead_tmp(tmp2); > > -- > 1.6.3.3 > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net