From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=46944 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PcXc5-0000Ta-Ol for qemu-devel@nongnu.org; Tue, 11 Jan 2011 01:21:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PcXc4-0008Rz-Qa for qemu-devel@nongnu.org; Tue, 11 Jan 2011 01:21:49 -0500 Received: from hall.aurel32.net ([88.191.126.93]:41643) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PcXc4-0008Rc-M8 for qemu-devel@nongnu.org; Tue, 11 Jan 2011 01:21:48 -0500 Received: from aurel32 by hall.aurel32.net with local (Exim 4.69) (envelope-from ) id 1PcXbw-0003ia-EN for qemu-devel@nongnu.org; Tue, 11 Jan 2011 07:21:40 +0100 Resent-Message-ID: <20110111062140.GC10453@hall.aurel32.net> Resent-To: qemu-devel@nongnu.org Date: Mon, 10 Jan 2011 20:20:39 +0100 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH 2/4] target-arm: Fix implementation of VRSQRTS Message-ID: <20110110192039.GP17026@hall.aurel32.net> References: <1294392387-24300-1-git-send-email-peter.maydell@linaro.org> <1294392387-24300-3-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1294392387-24300-3-git-send-email-peter.maydell@linaro.org> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell On Fri, Jan 07, 2011 at 09:26:25AM +0000, Peter Maydell wrote: > The implementation of the ARM VRSQRTS instruction (which calculates > (3 - op1 * op2) / 2) was missing the division operation. It also > did not handle the special cases of (0,inf) and (inf,0). > > Signed-off-by: Peter Maydell > --- > target-arm/helper.c | 10 +++++++++- > 1 files changed, 9 insertions(+), 1 deletions(-) Reviewed-by: Aurelien Jarno > diff --git a/target-arm/helper.c b/target-arm/helper.c > index 705b99f..ac47de0 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -2612,8 +2612,16 @@ float32 HELPER(recps_f32)(float32 a, float32 b, CPUState *env) > float32 HELPER(rsqrts_f32)(float32 a, float32 b, CPUState *env) > { > float_status *s = &env->vfp.fp_status; > + float32 two = int32_to_float32(2, s); > float32 three = int32_to_float32(3, s); > - return float32_sub(three, float32_mul(a, b, s), s); > + float32 product; > + if ((float32_is_infinity(a) && float32_is_zero_or_denormal(b)) || > + (float32_is_infinity(b) && float32_is_zero_or_denormal(a))) { > + product = float32_zero; > + } else { > + product = float32_mul(a, b, s); > + } > + return float32_div(float32_sub(three, product, s), two, s); > } > > /* NEON helpers. */ > -- > 1.6.3.3 > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net