From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=44871 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Pi5iZ-0005mW-Ms for qemu-devel@nongnu.org; Wed, 26 Jan 2011 08:48:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Pi5hU-0006K0-Bt for qemu-devel@nongnu.org; Wed, 26 Jan 2011 08:47:26 -0500 Received: from mx1.redhat.com ([209.132.183.28]:39543) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Pi5hT-0006II-Dx for qemu-devel@nongnu.org; Wed, 26 Jan 2011 08:46:20 -0500 Date: Wed, 26 Jan 2011 15:46:01 +0200 From: "Michael S. Tsirkin" Message-ID: <20110126134601.GE12805@redhat.com> References: <426869a882ff2ab059e7c49e87862658cc29d62c.1296035044.git.yamahata@valinux.co.jp> <20110126120959.GB11913@redhat.com> <20110126131748.GA4395@valinux.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20110126131748.GA4395@valinux.co.jp> Subject: [Qemu-devel] Re: [PATCH] pci: w1cmask[PCI_BRIDGE_CONTROL] initialized incorrectly List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Isaku Yamahata Cc: qemu-devel@nongnu.org On Wed, Jan 26, 2011 at 10:17:48PM +0900, Isaku Yamahata wrote: > The bit should be writable, not w1c. > > 3.2.5.18 bridge control register > bit 11 Discard Timer SERR# Enable > > When set to 1, this bit enables the bridge to assert SERR# on > the primary interface when either the Primary Discard Timer or > Secondary Discard Timer expires and a Delayed Transaction is > discarded from a queue in the bridge. The default state of this > bit must be 0 after reset. > 0 - do not assert SERR# on the primary interface as > a result of the expiration of either the Primary > Discard Timer or Secondary Discard Timer > 1 - assert SERR# on the primary interface if either > the Primary Discard Timer or Secondary Discard > Timer expires and a Delayed Transaction Yes but #define PCI_BRIDGE_CTL_DISCARD_STATUS 0x400 /* Discard timer status */ So this is bit 10? BTW, how about moving these bits to linux and then to our pci_regs.h? >S. Tsirkin wrote: > > On Wed, Jan 26, 2011 at 06:45:27PM +0900, Isaku Yamahata wrote: > > > pci_init_wmask_bridge() incorrectly set w1cmask[PCI_BRIDGE_CONTROL]. > > > This patch removes the line otherwise the assert(!(wmask & w1cmask)) in > > > pci_default_write_config() is hit. > > > > > > Signed-off-by: Isaku Yamahata > > > > Maybe clear in wmask? This bit really should be w1c, should it not? > > > > > --- > > > hw/pci.c | 4 ---- > > > 1 files changed, 0 insertions(+), 4 deletions(-) > > > > > > diff --git a/hw/pci.c b/hw/pci.c > > > index b8f5385..79a46e7 100644 > > > --- a/hw/pci.c > > > +++ b/hw/pci.c > > > @@ -643,10 +643,6 @@ static void pci_init_wmask_bridge(PCIDevice *d) > > > PCI_BRIDGE_CTL_SEC_DISCARD | > > > PCI_BRIDGE_CTL_DISCARD_STATUS | > > > PCI_BRIDGE_CTL_DISCARD_SERR); > > > - /* Below does not do anything as we never set this bit, put here for > > > - * completeness. */ > > > - pci_set_word(d->w1cmask + PCI_BRIDGE_CONTROL, > > > - PCI_BRIDGE_CTL_DISCARD_STATUS); > > > } > > > > > > static int pci_init_multifunction(PCIBus *bus, PCIDevice *dev) > > > -- > > > 1.7.1.1 > > > > -- > yamahata