From: Alon Levy <alevy@redhat.com>
To: Aurelien Jarno <aurelien@aurel32.net>
Cc: Christophe Lyon <christophe.lyon@st.com>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH 1/8] target-arm: Fixes for several shift instructions: VRSHL, VRSHR, VRSHRN, VSHLL, VRSRA.
Date: Mon, 31 Jan 2011 11:54:46 +0200 [thread overview]
Message-ID: <20110131095445.GB3657@playa.tlv.redhat.com> (raw)
In-Reply-To: <20110131094414.GA7112@hall.aurel32.net>
On Mon, Jan 31, 2011 at 10:44:14AM +0100, Aurelien Jarno wrote:
> On Mon, Jan 31, 2011 at 10:35:30AM +0100, Christophe Lyon wrote:
> > On 31.01.2011 09:20, Aurelien Jarno wrote:
> > > On Fri, Jan 28, 2011 at 04:50:59PM +0100, christophe.lyon@st.com wrote:
> > >> From: Christophe Lyon <christophe.lyon@st.com>
> > >>
> > >> Handle corner cases where the addition of the rounding constant could
> > >> cause overflows.
> > >
> > > After applying this patch, I get the following gcc warning:
> > > CC translate.o
> > > cc1: warnings being treated as errors
> > > qemu/target-arm/translate.c: In function ‘disas_neon_data_insn’:
> > > qemu/target-arm/translate.c:4212: error: ‘imm’ may be used uninitialized in this function
> > > make: *** [translate.o] Error 1
> > >
> >
> > Which GCC version are you using? I don't have such a warning (using GCC-4.5.1 on x86_64).
> >
>
> I get this error with GCC 4.3.5, GCC 4.4.5, GCC 4.5.2 and GCC 4.6.0
> (r169270). This is also on x86_64.
>
gcc 4.6.0 turned on warnings also on set but not used variables, there
are a few places that need fixes (pretty simple). This is the patch
I have applied:
commit 53bf1becf85a14c399698ae0961eb2b08d231986
Author: Alon Levy <alevy@redhat.com>
Date: Fri Jan 28 11:04:43 2011 +0200
(temp) gcc 4.6.0 corrections for build
diff --git a/block/qcow2-refcount.c b/block/qcow2-refcount.c
index e37e226..da1a2e9 100644
--- a/block/qcow2-refcount.c
+++ b/block/qcow2-refcount.c
@@ -708,6 +708,9 @@ int qcow2_update_snapshot_refcount(BlockDriverState *bs,
int l2_size, i, j, l1_modified, l2_modified, nb_csectors, refcount;
int ret;
+ (void)l2_modified;
+ (void)l2_size;
+
l2_table = NULL;
l1_table = NULL;
l1_size2 = l1_size * sizeof(uint64_t);
diff --git a/target-i386/kvm.c b/target-i386/kvm.c
index 7dfc357..a7019ee 100644
--- a/target-i386/kvm.c
+++ b/target-i386/kvm.c
@@ -892,7 +892,7 @@ static int kvm_get_xsave(CPUState *env)
#ifdef KVM_CAP_XSAVE
struct kvm_xsave* xsave;
int ret, i;
- uint16_t cwd, swd, twd, fop;
+ uint16_t cwd, swd, twd;
if (!kvm_has_xsave())
return kvm_get_fpu(env);
@@ -907,7 +907,6 @@ static int kvm_get_xsave(CPUState *env)
cwd = (uint16_t)xsave->region[0];
swd = (uint16_t)(xsave->region[0] >> 16);
twd = (uint16_t)xsave->region[1];
- fop = (uint16_t)(xsave->region[1] >> 16);
env->fpstt = (swd >> 11) & 7;
env->fpus = swd;
env->fpuc = cwd;
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 5dd6a2c..b4d230b 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -582,6 +582,7 @@ void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
nparam = gen_opparam_ptr++;
#ifdef TCG_TARGET_I386
call_type = (flags & TCG_CALL_TYPE_MASK);
+ (void)call_type;
#endif
if (ret != TCG_CALL_DUMMY_ARG) {
#if TCG_TARGET_REG_BITS < 64
diff --git a/ui/sdl.c b/ui/sdl.c
index f599d42..a1458ce 100644
--- a/ui/sdl.c
+++ b/ui/sdl.c
@@ -87,12 +87,6 @@ static void sdl_update(DisplayState *ds, int x, int y, int w, int h)
static void sdl_setdata(DisplayState *ds)
{
- SDL_Rect rec;
- rec.x = 0;
- rec.y = 0;
- rec.w = real_screen->w;
- rec.h = real_screen->h;
-
if (guest_screen != NULL) SDL_FreeSurface(guest_screen);
guest_screen = SDL_CreateRGBSurfaceFrom(ds_get_data(ds), ds_get_width(ds), ds_get_height(ds),
> --
> Aurelien Jarno GPG: 1024D/F1BCDB73
> aurelien@aurel32.net http://www.aurel32.net
>
next prev parent reply other threads:[~2011-01-31 9:55 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-28 15:50 [Qemu-devel] [PATCH 0/8] target-arm: Fix Neon instructions VQMOVUN VQRSHL VQRSHRN VQRSHRUN VQSHRN VQSHRUN VSLI VSRI christophe.lyon
2011-01-28 15:50 ` [Qemu-devel] [PATCH 1/8] target-arm: Fixes for several shift instructions: VRSHL, VRSHR, VRSHRN, VSHLL, VRSRA christophe.lyon
2011-01-31 8:20 ` Aurelien Jarno
2011-01-31 9:35 ` Christophe Lyon
2011-01-31 9:44 ` Aurelien Jarno
2011-01-31 9:54 ` Alon Levy [this message]
2011-01-31 14:27 ` Christophe Lyon
2011-01-31 15:59 ` Aurelien Jarno
2011-01-31 16:46 ` Peter Maydell
2011-01-31 18:09 ` Christophe Lyon
2011-01-28 15:51 ` [Qemu-devel] [PATCH 2/8] target-arm: Create and use neon_unarrow_sat* helpers christophe.lyon
2011-01-28 15:51 ` [Qemu-devel] [PATCH 3/8] target-arm: VQRSHRN related changes christophe.lyon
2011-01-28 15:51 ` [Qemu-devel] [PATCH 4/8] target-arm: fiddle decoding of 64 bit shift by imm and narrow christophe.lyon
2011-01-28 15:51 ` [Qemu-devel] [PATCH 5/8] target-arm: fix neon vqrshl instruction christophe.lyon
2011-01-28 15:51 ` [Qemu-devel] [PATCH 6/8] target-arm: Fix Neon VQ(R)SHRN instructions christophe.lyon
2011-01-28 15:51 ` [Qemu-devel] [PATCH 7/8] implement vsli.64, vsri.64 christophe.lyon
2011-01-28 15:51 ` [Qemu-devel] [PATCH 8/8] target-arm: Fix VQRSHL Neon instructions (signed/unsigned 64 bits and signed 32 bits variants) christophe.lyon
2011-01-28 16:03 ` [Qemu-devel] [PATCH 0/8] target-arm: Fix Neon instructions VQMOVUN VQRSHL VQRSHRN VQRSHRUN VQSHRN VQSHRUN VSLI VSRI Peter Maydell
-- strict thread matches above, loose matches on Subject: below --
2011-01-31 18:06 [Qemu-devel] [PATCH v2 " christophe.lyon
2011-01-31 18:06 ` [Qemu-devel] [PATCH 1/8] target-arm: Fixes for several shift instructions: VRSHL, VRSHR, VRSHRN, VSHLL, VRSRA christophe.lyon
2011-02-07 15:57 ` Peter Maydell
2011-02-09 12:16 ` Christophe Lyon
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