From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=33386 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PnEzk-0007r9-Fe for qemu-devel@nongnu.org; Wed, 09 Feb 2011 13:42:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PnEzi-0005zi-Ox for qemu-devel@nongnu.org; Wed, 09 Feb 2011 13:42:27 -0500 Received: from hall.aurel32.net ([88.191.126.93]:39050) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PnEzi-0005zY-B1 for qemu-devel@nongnu.org; Wed, 09 Feb 2011 13:42:26 -0500 Date: Wed, 9 Feb 2011 19:42:34 +0100 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH v2 5/6] target-arm: Silence NaNs resulting from half-precision conversions Message-ID: <20110209184234.GF3131@volta.aurel32.net> References: <1297268850-5777-1-git-send-email-peter.maydell@linaro.org> <1297268850-5777-6-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1297268850-5777-6-git-send-email-peter.maydell@linaro.org> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: Christophe Lyon , qemu-devel@nongnu.org, patches@linaro.org On Wed, Feb 09, 2011 at 04:27:29PM +0000, Peter Maydell wrote: > Silence the NaNs that may result from half-precision conversion, > as we do for the other conversions. > > Signed-off-by: Peter Maydell > --- > target-arm/helper.c | 12 ++++++++++-- > 1 files changed, 10 insertions(+), 2 deletions(-) Reviewed-by: Aurelien Jarno > diff --git a/target-arm/helper.c b/target-arm/helper.c > index d46defc..503278c 100644 > --- a/target-arm/helper.c > +++ b/target-arm/helper.c > @@ -2627,14 +2627,22 @@ float32 HELPER(vfp_fcvt_f16_to_f32)(uint32_t a, CPUState *env) > { > float_status *s = &env->vfp.fp_status; > int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0; > - return float16_to_float32(a, ieee, s); > + float32 r = float16_to_float32(a, ieee, s); > + if (ieee) { > + return float32_maybe_silence_nan(r); > + } > + return r; > } > > uint32_t HELPER(vfp_fcvt_f32_to_f16)(float32 a, CPUState *env) > { > float_status *s = &env->vfp.fp_status; > int ieee = (env->vfp.xregs[ARM_VFP_FPSCR] & (1 << 26)) == 0; > - return float32_to_float16(a, ieee, s); > + float16 r = float32_to_float16(a, ieee, s); > + if (ieee) { > + return float16_maybe_silence_nan(r); > + } > + return r; > } > > float32 HELPER(recps_f32)(float32 a, float32 b, CPUState *env) > -- > 1.7.1 > > > -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net