From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=42018 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PpLvl-0003Ne-Q1 for qemu-devel@nongnu.org; Tue, 15 Feb 2011 09:31:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PpLv4-0007MZ-5c for qemu-devel@nongnu.org; Tue, 15 Feb 2011 09:30:23 -0500 Received: from os.inf.tu-dresden.de ([141.76.48.99]:34782) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PpLv3-0007MK-O6 for qemu-devel@nongnu.org; Tue, 15 Feb 2011 09:30:22 -0500 Date: Tue, 15 Feb 2011 15:30:17 +0100 From: Adam Lackorzynski Subject: Re: [Qemu-devel] [PATCH 1/3] target-arm: Setup smpboot code in all setups Message-ID: <20110215143017.GF19666@os.inf.tu-dresden.de> References: <20110215104852.GB19666@os.inf.tu-dresden.de> <20110215131245.GE19666@os.inf.tu-dresden.de> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable In-Reply-To: List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: qemu-devel@nongnu.org On Tue Feb 15, 2011 at 13:37:44 +0000, Peter Maydell wrote: > On 15 February 2011 13:12, Adam Lackorzynski = wrote: > > > > On Tue Feb 15, 2011 at 13:01:08 +0000, Peter Maydell wrote: > >> On 15 February 2011 10:48, Adam Lackorzynski wrote: > >> > Make smpboot available not only for Linux but for all setups. > >> > >> I'm not convinced about this. I think if you're providing a raw > >> image for an SMP system (rather than a Linux kernel) then it's > >> your job to provide an image which handles the bootup of the > >> secondary CPUs, the same way it would be if you were providing > >> a ROM image for real hardware. > > > > Ok, this is one possibility. Another one would be something like this: >=20 > > @@ -112,7 +112,11 @@ static void secondary_cpu_reset(void *opaque) > > =A0 /* Set entry point for secondary CPUs. =A0This assumes we're using > > =A0 =A0 =A0the init code from arm_boot.c. =A0Real hardware resets all C= PUs > > =A0 =A0 =A0the same. =A0*/ > > - =A0env->regs[15] =3D SMP_BOOT_ADDR; > > + =A0if (realview_binfo.is_linux) { > > + =A0 =A0 =A0env->regs[15] =3D SMP_BOOT_ADDR; > > + =A0} else { > > + =A0 =A0 =A0env->regs[15] =3D realview_binfo.entry; > > + =A0} > > =A0} >=20 > Moving in the right direction, but it would be cleaner if the secondary > CPU reset was handled inside arm_boot.c, I think (there is a TODO > in that file to that effect). Then we could get rid of the cpu reset > hook from realview.c. Like the following? Subject: [PATCH] target-arm: Integrate secondary CPU reset in arm_boot Integrate secondary CPU reset into arm_boot, removing it from realview.c. On non-Linux systems secondary CPUs start with the same entry as the boot CPU. Signed-off-by: Adam Lackorzynski --- hw/arm_boot.c | 23 +++++++++++++++-------- hw/realview.c | 14 -------------- 2 files changed, 15 insertions(+), 22 deletions(-) diff --git a/hw/arm_boot.c b/hw/arm_boot.c index 620550b..41e99d1 100644 --- a/hw/arm_boot.c +++ b/hw/arm_boot.c @@ -175,7 +175,7 @@ static void set_kernel_args_old(struct arm_boot_info *i= nfo, } } =20 -static void main_cpu_reset(void *opaque) +static void do_cpu_reset(void *opaque) { CPUState *env =3D opaque; struct arm_boot_info *info =3D env->boot_info; @@ -187,16 +187,20 @@ static void main_cpu_reset(void *opaque) env->regs[15] =3D info->entry & 0xfffffffe; env->thumb =3D info->entry & 1; } else { - env->regs[15] =3D info->loader_start; - if (old_param) { - set_kernel_args_old(info, info->initrd_size, + if (env =3D=3D first_cpu) { + env->regs[15] =3D info->loader_start; + if (old_param) { + set_kernel_args_old(info, info->initrd_size, + info->loader_start); + } else { + set_kernel_args(info, info->initrd_size, info->loader_start); + } } else { - set_kernel_args(info, info->initrd_size, info->loader_star= t); + env->regs[15] =3D info->smp_loader_start; } } } - /* TODO: Reset secondary CPUs. */ } =20 void arm_load_kernel(CPUState *env, struct arm_boot_info *info) @@ -217,7 +221,6 @@ void arm_load_kernel(CPUState *env, struct arm_boot_inf= o *info) =20 if (info->nb_cpus =3D=3D 0) info->nb_cpus =3D 1; - env->boot_info =3D info; =20 #ifdef TARGET_WORDS_BIGENDIAN big_endian =3D 1; @@ -279,5 +282,9 @@ void arm_load_kernel(CPUState *env, struct arm_boot_inf= o *info) info->initrd_size =3D initrd_size; } info->is_linux =3D is_linux; - qemu_register_reset(main_cpu_reset, env); + + for (; env; env =3D env->next_cpu) { + env->boot_info =3D info; + qemu_register_reset(do_cpu_reset, env); + } } diff --git a/hw/realview.c b/hw/realview.c index 6eb6c6a..fae444a 100644 --- a/hw/realview.c +++ b/hw/realview.c @@ -104,17 +104,6 @@ static struct arm_boot_info realview_binfo =3D { .smp_loader_start =3D SMP_BOOT_ADDR, }; =20 -static void secondary_cpu_reset(void *opaque) -{ - CPUState *env =3D opaque; - - cpu_reset(env); - /* Set entry point for secondary CPUs. This assumes we're using - the init code from arm_boot.c. Real hardware resets all CPUs - the same. */ - env->regs[15] =3D SMP_BOOT_ADDR; -} - /* The following two lists must be consistent. */ enum realview_board_type { BOARD_EB, @@ -176,9 +165,6 @@ static void realview_init(ram_addr_t ram_size, } irqp =3D arm_pic_init_cpu(env); cpu_irq[n] =3D irqp[ARM_PIC_CPU_IRQ]; - if (n > 0) { - qemu_register_reset(secondary_cpu_reset, env); - } } if (arm_feature(env, ARM_FEATURE_V7)) { if (is_mpcore) { --=20 1.7.2.3 Adam --=20 Adam adam@os.inf.tu-dresden.de Lackorzynski http://os.inf.tu-dresden.de/~adam/