From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=58968 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1PrDxk-00071x-Nd for qemu-devel@nongnu.org; Sun, 20 Feb 2011 13:24:53 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1PrDxj-0000y9-Ao for qemu-devel@nongnu.org; Sun, 20 Feb 2011 13:24:52 -0500 Received: from hall.aurel32.net ([88.191.126.93]:43632) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1PrDxj-0000y5-4y for qemu-devel@nongnu.org; Sun, 20 Feb 2011 13:24:51 -0500 Date: Sun, 20 Feb 2011 19:24:46 +0100 From: Aurelien Jarno Subject: Re: [Qemu-devel] [PATCH] Fix obvious mistake in pxa2xx i2s driver Message-ID: <20110220182446.GU18619@volta.aurel32.net> References: <1297702750-32203-1-git-send-email-anarsoul@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-15 Content-Disposition: inline In-Reply-To: <1297702750-32203-1-git-send-email-anarsoul@gmail.com> List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Vasily Khoruzhick Cc: "qemu-devel@nongnu.org" On Mon, Feb 14, 2011 at 06:59:10PM +0200, Vasily Khoruzhick wrote: > RST bit is (1 << 3) bit, not (1 << 2), fix condition > that enables i2s if ENB is set and RST is not set. > > Signed-off-by: Vasily Khoruzhick > --- > hw/pxa2xx.c | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c > index d966846..68b67ae 100644 > --- a/hw/pxa2xx.c > +++ b/hw/pxa2xx.c > @@ -1631,7 +1631,7 @@ static void pxa2xx_i2s_write(void *opaque, target_phys_addr_t addr, > } > if (value & (1 << 4)) /* EFWR */ > printf("%s: Attempt to use special function\n", __FUNCTION__); > - s->enable = ((value ^ 4) & 5) == 5; /* ENB && !RST*/ > + s->enable = ((value ^ (1 << 3)) & 9) == 9; /* ENB && !RST*/ > pxa2xx_i2s_update(s); > break; > case SACR1: The fix looks fine, but the resulting code is probably over engineered... What about: s->enable = (value & 9) == 1; ? -- Aurelien Jarno GPG: 1024D/F1BCDB73 aurelien@aurel32.net http://www.aurel32.net