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From: Isaku Yamahata <yamahata@valinux.co.jp>
To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: qemu-devel@nongnu.org
Subject: [Qemu-devel] Re: [PATCH v3 3/3] piix_pci: optimize set irq path
Date: Tue, 22 Mar 2011 09:50:37 +0900	[thread overview]
Message-ID: <20110322005037.GD9998@valinux.co.jp> (raw)
In-Reply-To: <20110321141022.GB30198@redhat.com>

On Mon, Mar 21, 2011 at 04:10:22PM +0200, Michael S. Tsirkin wrote:
> > @@ -37,8 +37,27 @@
> >  
> >  typedef PCIHostState I440FXState;
> >  
> > +#define PIIX_NUM_PIC_IRQS       16      /* i8259 * 2 */
> > +#define PIIX_NUM_PIRQS          4ULL    /* PIRQ[A-D] */
> 
> I've changed this to
> ((uint64_t)PCI_NUM_PINS)
> 
> Makes sense?

No. The number of pirq is independent of PCI_NUM_PINS.
For example, ich9 has 8 pirq (PIRQ[A-H]).
Probably same pin name (A-D) causes the confusion, they are irrelevant.
-- 
yamahata

  reply	other threads:[~2011-03-22  0:50 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-03-19 13:24 [Qemu-devel] [PATCH v3 0/3] piix_pci: optimize irq data path Isaku Yamahata
2011-03-19 13:24 ` [Qemu-devel] [PATCH v3 1/3] pci: add accessor function to get irq levels Isaku Yamahata
2011-03-19 13:24 ` [Qemu-devel] [PATCH v3 2/3] piix_pci: eliminate PIIX3State::pci_irq_levels Isaku Yamahata
2011-03-19 13:24 ` [Qemu-devel] [PATCH v3 3/3] piix_pci: optimize set irq path Isaku Yamahata
2011-03-21 11:37   ` [Qemu-devel] " Michael S. Tsirkin
2011-03-21 12:10     ` Isaku Yamahata
2011-03-21 12:31       ` Michael S. Tsirkin
2011-03-21 12:56         ` Isaku Yamahata
2011-03-21 13:01           ` Michael S. Tsirkin
2011-03-21 12:26     ` Isaku Yamahata
2011-03-21 14:10   ` Michael S. Tsirkin
2011-03-22  0:50     ` Isaku Yamahata [this message]
2011-03-22 13:40       ` Michael S. Tsirkin
2011-03-22 14:07         ` Isaku Yamahata
2011-03-22 16:24           ` Michael S. Tsirkin

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