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Date: Tue, 22 Mar 2011 09:50:37 +0900
From: Isaku Yamahata <yamahata@valinux.co.jp>
Message-ID: <20110322005037.GD9998@valinux.co.jp>
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Subject: [Qemu-devel] Re: [PATCH v3 3/3] piix_pci: optimize set irq path
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To: "Michael S. Tsirkin" <mst@redhat.com>
Cc: qemu-devel@nongnu.org

On Mon, Mar 21, 2011 at 04:10:22PM +0200, Michael S. Tsirkin wrote:
> > @@ -37,8 +37,27 @@
> >  
> >  typedef PCIHostState I440FXState;
> >  
> > +#define PIIX_NUM_PIC_IRQS       16      /* i8259 * 2 */
> > +#define PIIX_NUM_PIRQS          4ULL    /* PIRQ[A-D] */
> 
> I've changed this to
> ((uint64_t)PCI_NUM_PINS)
> 
> Makes sense?

No. The number of pirq is independent of PCI_NUM_PINS.
For example, ich9 has 8 pirq (PIRQ[A-H]).
Probably same pin name (A-D) causes the confusion, they are irrelevant.
-- 
yamahata