From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from [140.186.70.92] (port=53247 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Q4FQo-0003l2-M4 for qemu-devel@nongnu.org; Mon, 28 Mar 2011 12:36:48 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1Q4FQa-0006Ll-Mi for qemu-devel@nongnu.org; Mon, 28 Mar 2011 12:36:30 -0400 Received: from mx1.redhat.com ([209.132.183.28]:27376) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1Q4FQa-0006Lc-Cq for qemu-devel@nongnu.org; Mon, 28 Mar 2011 12:36:28 -0400 Date: Mon, 28 Mar 2011 18:36:10 +0200 From: "Michael S. Tsirkin" Message-ID: <20110328163610.GA29503@redhat.com> References: <1bebb0f46f1bc7df5e0619169e54138c043ce96a.1301324539.git.yamahata@valinux.co.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1bebb0f46f1bc7df5e0619169e54138c043ce96a.1301324539.git.yamahata@valinux.co.jp> Subject: [Qemu-devel] Re: [PATCH v6 4/4] piix_pci: load path clean up List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Isaku Yamahata Cc: qemu-devel@nongnu.org On Tue, Mar 29, 2011 at 12:05:30AM +0900, Isaku Yamahata wrote: > The previous patch didn't change the behavior when load, > it resulted in ugly code. This patch cleans it up. > > With this patch, pic irq lines are manipulated when loaded. > It is expected that it won't change the behaviour because > the interrupts are level: at the moment e.g. pci devices already > reassert interrupts on load. > > Signed-off-by: Isaku Yamahata > --- > Changes v3 -> v4: > - newly introduced > - TODO: test more OSes, stress test with save/load, live-migration The patch looks good to me. You plan to do some of this testing? > --- > hw/piix_pci.c | 12 ++++-------- > 1 files changed, 4 insertions(+), 8 deletions(-) > > diff --git a/hw/piix_pci.c b/hw/piix_pci.c > index 7ffb821..5f0d92f 100644 > --- a/hw/piix_pci.c > +++ b/hw/piix_pci.c > @@ -281,8 +281,7 @@ static void piix3_set_irq_pic(PIIX3State *piix3, int pic_irq) > (pic_irq * PIIX_NUM_PIRQS)))); > } > > -static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level, > - bool propagate) > +static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level) > { > int pic_irq; > uint64_t mask; > @@ -296,15 +295,13 @@ static void piix3_set_irq_level(PIIX3State *piix3, int pirq, int level, > piix3->pic_levels &= ~mask; > piix3->pic_levels |= mask * !!level; > > - if (propagate) { > - piix3_set_irq_pic(piix3, pic_irq); > - } > + piix3_set_irq_pic(piix3, pic_irq); > } > > static void piix3_set_irq(void *opaque, int pirq, int level) > { > PIIX3State *piix3 = opaque; > - piix3_set_irq_level(piix3, pirq, level, true); > + piix3_set_irq_level(piix3, pirq, level); > } > > /* irq routing is changed. so rebuild bitmap */ > @@ -315,8 +312,7 @@ static void piix3_update_irq_levels(PIIX3State *piix3) > piix3->pic_levels = 0; > for (pirq = 0; pirq < PIIX_NUM_PIRQS; pirq++) { > piix3_set_irq_level(piix3, pirq, > - pci_bus_get_irq_level(piix3->dev.bus, pirq), > - false); > + pci_bus_get_irq_level(piix3->dev.bus, pirq)); > } > } > > -- > 1.7.1.1