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Date: Fri, 1 Apr 2011 04:07:10 +0300
From: "Michael S. Tsirkin" <mst@redhat.com>
Subject: Re: [Qemu-devel] [PATCH RFC] vga: flag vga ram for notifiers
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To: Anthony Liguori <anthony@codemonkey.ws>
Cc: Peter Maydell <peter.maydell@linaro.org>, Alex Williamson <alex.williamson@redhat.com>, qemu-devel@nongnu.org

On Thu, Mar 31, 2011 at 07:44:35PM -0500, Anthony Liguori wrote:
> On 03/31/2011 06:42 PM, Michael S. Tsirkin wrote:
> >On Thu, Mar 31, 2011 at 04:49:46PM -0500, Anthony Liguori wrote:
> >>On 03/31/2011 04:38 PM, Michael S. Tsirkin wrote:
> >>>>That seems like a clearer API, yes. I think it makes it much more
> >>>>obvious what it's trying to achieve.
> >>>>
> >>>>-- PMM
> >>>Maybe register_dma_area - its' not 100% virtio specific.
> >>It's never been clear to me whether that's true or not.  I've heard
> >>mixed things about whether devices DMA to other devices.  I've never
> >>been able to find something in a specification stating
> >>authoritatively one way or another.
> >>
> >>Regards,
> >>
> >>Anthony Liguori
> >>
> >AFAIK the capability of cross-talk between PCI devices
> >exists in PCI and is optional in PCI Express.
> >
> >PCI spec says:
> >	Full multi-master capability allowing any PCI master peer-to-peer
> >	access to any PCI master/target.
> >
> >The Express spec says:
> >	"The capability to route peer-to-peer transactions between hierarchy
> >	domains through a Root Complex is optional and implementation dependent.
> >	For example, an implementation may incorporate a real or virtual Switch
> >	internally within the Root Complex to enable full peer-to- peer support
> >	in a software transparent way."
> 
> What's not clear to me though, is whether peer-to-peer transactions
> are done via a special PCI mechanism or whether it's done by doing a
> I/O access to the address that the device happens to be mapped to.

Section 2.2.4.1:
Address routing is used with Memory and I/O Requests.

-- 
MST