* [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci
@ 2011-05-08 0:01 Alexander Graf
2011-05-09 13:44 ` Paul Brook
0 siblings, 1 reply; 9+ messages in thread
From: Alexander Graf @ 2011-05-08 0:01 UTC (permalink / raw)
To: QEMU-devel Developers; +Cc: Scott Wood, Edgar E. Iglesias, Liu Yu, Paul Brook
The e500 PCI controller isn't qdev'ified yet. This leads to severe issues
when running with -drive.
To be able to use a virtio disk with an e500 VM, let's convert the PCI
controller over to qdev.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
v2 -> v3:
- rebase to current code base
- fix endian issue
- use sysbus helpers
v3 -> v4:
- drop base_addr
v4 -> v5:
- model qdev conversion similar to versatilepb (pbrook)
v5 -> v6:
- use qdev.vmsd for vmstate registration (pbrook)
---
hw/ppce500.h | 22 --------
hw/ppce500_mpc8544ds.c | 16 +++---
hw/ppce500_pci.c | 136 +++++++++++++++++++++++++++---------------------
3 files changed, 84 insertions(+), 90 deletions(-)
delete mode 100644 hw/ppce500.h
diff --git a/hw/ppce500.h b/hw/ppce500.h
deleted file mode 100644
index 24d49bb..0000000
--- a/hw/ppce500.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * QEMU PowerPC E500 emulation shared definitions
- *
- * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
- *
- * Author: Yu Liu, <yu.liu@freescale.com>
- *
- * This file is derived from hw/ppc440.h
- * the copyright for that material belongs to the original owners.
- *
- * This is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#if !defined(PPC_E500_H)
-#define PPC_E500_H
-
-PCIBus *ppce500_pci_init(qemu_irq *pic, target_phys_addr_t registers);
-
-#endif /* !defined(PPC_E500_H) */
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 4120977..f92d07e 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -29,9 +29,9 @@
#include "device_tree.h"
#include "openpic.h"
#include "ppc.h"
-#include "ppce500.h"
#include "loader.h"
#include "elf.h"
+#include "sysbus.h"
#define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb"
#define UIMAGE_LOAD_BASE 0
@@ -222,7 +222,8 @@ static void mpc8544ds_init(ram_addr_t ram_size,
target_long initrd_size=0;
int i=0;
unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
- qemu_irq *irqs, *mpic, *pci_irqs;
+ qemu_irq *irqs, *mpic;
+ DeviceState *dev;
/* Setup CPU */
if (cpu_model == NULL) {
@@ -269,12 +270,11 @@ static void mpc8544ds_init(ram_addr_t ram_size,
}
/* PCI */
- pci_irqs = qemu_malloc(sizeof(qemu_irq) * 4);
- pci_irqs[0] = mpic[pci_irq_nrs[0]];
- pci_irqs[1] = mpic[pci_irq_nrs[1]];
- pci_irqs[2] = mpic[pci_irq_nrs[2]];
- pci_irqs[3] = mpic[pci_irq_nrs[3]];
- pci_bus = ppce500_pci_init(pci_irqs, MPC8544_PCI_REGS_BASE);
+ dev = sysbus_create_varargs("e500-pcihost", MPC8544_PCI_REGS_BASE,
+ mpic[pci_irq_nrs[0]], mpic[pci_irq_nrs[1]],
+ mpic[pci_irq_nrs[2]], mpic[pci_irq_nrs[3]],
+ NULL);
+ pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
if (!pci_bus)
printf("couldn't create PCI controller!\n");
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index 83a20e4..069af96 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -15,7 +15,6 @@
*/
#include "hw.h"
-#include "ppce500.h"
#include "pci.h"
#include "pci_host.h"
#include "bswap.h"
@@ -29,7 +28,8 @@
#define PCIE500_CFGADDR 0x0
#define PCIE500_CFGDATA 0x4
#define PCIE500_REG_BASE 0xC00
-#define PCIE500_REG_SIZE (0x1000 - PCIE500_REG_BASE)
+#define PCIE500_ALL_SIZE 0x1000
+#define PCIE500_REG_SIZE (PCIE500_ALL_SIZE - PCIE500_REG_BASE)
#define PPCE500_PCI_CONFIG_ADDR 0x0
#define PPCE500_PCI_CONFIG_DATA 0x4
@@ -73,11 +73,15 @@ struct pci_inbound {
};
struct PPCE500PCIState {
+ PCIHostState pci_state;
struct pci_outbound pob[PPCE500_PCI_NR_POBS];
struct pci_inbound pib[PPCE500_PCI_NR_PIBS];
uint32_t gasket_time;
- PCIHostState pci_state;
- PCIDevice *pci_dev;
+ qemu_irq irq[4];
+ /* mmio maps */
+ int cfgaddr;
+ int cfgdata;
+ int reg;
};
typedef struct PPCE500PCIState PPCE500PCIState;
@@ -250,7 +254,6 @@ static const VMStateDescription vmstate_ppce500_pci = {
.minimum_version_id = 1,
.minimum_version_id_old = 1,
.fields = (VMStateField[]) {
- VMSTATE_PCI_DEVICE_POINTER(pci_dev, PPCE500PCIState),
VMSTATE_STRUCT_ARRAY(pob, PPCE500PCIState, PPCE500_PCI_NR_POBS, 1,
vmstate_pci_outbound, struct pci_outbound),
VMSTATE_STRUCT_ARRAY(pib, PPCE500PCIState, PPCE500_PCI_NR_PIBS, 1,
@@ -260,60 +263,73 @@ static const VMStateDescription vmstate_ppce500_pci = {
}
};
-PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers)
+static void e500_pci_map(SysBusDevice *dev, target_phys_addr_t base)
+{
+ PCIHostState *h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev));
+ PPCE500PCIState *s = DO_UPCAST(PPCE500PCIState, pci_state, h);
+
+ cpu_register_physical_memory(base + PCIE500_CFGADDR, 4, s->cfgaddr);
+ cpu_register_physical_memory(base + PCIE500_CFGDATA, 4, s->cfgdata);
+ cpu_register_physical_memory(base + PCIE500_REG_BASE, PCIE500_REG_SIZE,
+ s->reg);
+}
+
+static int e500_pcihost_initfn(SysBusDevice *dev)
+{
+ PCIHostState *h;
+ PPCE500PCIState *s;
+ PCIBus *b;
+ int i;
+
+ h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev));
+ s = DO_UPCAST(PPCE500PCIState, pci_state, h);
+
+ for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
+ sysbus_init_irq(dev, &s->irq[i]);
+ }
+
+ b = pci_register_bus(&s->pci_state.busdev.qdev, NULL, mpc85xx_pci_set_irq,
+ mpc85xx_pci_map_irq, s->irq, PCI_DEVFN(0x11, 0), 4);
+ s->pci_state.bus = b;
+
+ pci_create_simple(b, 0, "e500-host-bridge");
+
+ s->cfgaddr = pci_host_conf_register_mmio(&s->pci_state, DEVICE_BIG_ENDIAN);
+ s->cfgdata = pci_host_data_register_mmio(&s->pci_state,
+ DEVICE_LITTLE_ENDIAN);
+ s->reg = cpu_register_io_memory(e500_pci_reg_read, e500_pci_reg_write, s,
+ DEVICE_BIG_ENDIAN);
+ sysbus_init_mmio_cb(dev, PCIE500_ALL_SIZE, e500_pci_map);
+
+ return 0;
+}
+
+static int e500_host_bridge_initfn(PCIDevice *dev)
+{
+ pci_config_set_vendor_id(dev->config, PCI_VENDOR_ID_FREESCALE);
+ pci_config_set_device_id(dev->config, PCI_DEVICE_ID_MPC8533E);
+ pci_config_set_class(dev->config, PCI_CLASS_PROCESSOR_POWERPC);
+
+ return 0;
+}
+
+static PCIDeviceInfo e500_host_bridge_info = {
+ .qdev.name = "e500-host-bridge",
+ .qdev.desc = "Host bridge",
+ .qdev.size = sizeof(PCIDevice),
+ .init = e500_host_bridge_initfn,
+};
+
+static SysBusDeviceInfo e500_pcihost_info = {
+ .init = e500_pcihost_initfn,
+ .qdev.name = "e500-pcihost",
+ .qdev.size = sizeof(PPCE500PCIState),
+ .qdev.vmsd = &vmstate_ppce500_pci,
+};
+
+static void e500_pci_register(void)
{
- PPCE500PCIState *controller;
- PCIDevice *d;
- int index;
- static int ppce500_pci_id;
-
- controller = qemu_mallocz(sizeof(PPCE500PCIState));
-
- controller->pci_state.bus = pci_register_bus(NULL, "pci",
- mpc85xx_pci_set_irq,
- mpc85xx_pci_map_irq,
- pci_irqs, PCI_DEVFN(0x11, 0),
- 4);
- d = pci_register_device(controller->pci_state.bus,
- "host bridge", sizeof(PCIDevice),
- 0, NULL, NULL);
-
- pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_FREESCALE);
- pci_config_set_device_id(d->config, PCI_DEVICE_ID_MPC8533E);
- pci_config_set_class(d->config, PCI_CLASS_PROCESSOR_POWERPC);
-
- controller->pci_dev = d;
-
- /* CFGADDR */
- index = pci_host_conf_register_mmio(&controller->pci_state,
- DEVICE_BIG_ENDIAN);
- if (index < 0)
- goto free;
- cpu_register_physical_memory(registers + PCIE500_CFGADDR, 4, index);
-
- /* CFGDATA */
- index = pci_host_data_register_mmio(&controller->pci_state,
- DEVICE_BIG_ENDIAN);
- if (index < 0)
- goto free;
- cpu_register_physical_memory(registers + PCIE500_CFGDATA, 4, index);
-
- index = cpu_register_io_memory(e500_pci_reg_read,
- e500_pci_reg_write, controller,
- DEVICE_NATIVE_ENDIAN);
- if (index < 0)
- goto free;
- cpu_register_physical_memory(registers + PCIE500_REG_BASE,
- PCIE500_REG_SIZE, index);
-
- /* XXX load/save code not tested. */
- vmstate_register(&d->qdev, ppce500_pci_id++, &vmstate_ppce500_pci,
- controller);
-
- return controller->pci_state.bus;
-
-free:
- printf("%s error\n", __func__);
- qemu_free(controller);
- return NULL;
+ sysbus_register_withprop(&e500_pcihost_info);
+ pci_qdev_register(&e500_host_bridge_info);
}
+device_init(e500_pci_register);
--
1.6.0.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* [Qemu-devel] [PATCH 0/7] PPC: Add FSL (e500) MMU emulation v6
@ 2011-05-09 22:15 Alexander Graf
2011-05-09 22:15 ` [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci Alexander Graf
0 siblings, 1 reply; 9+ messages in thread
From: Alexander Graf @ 2011-05-09 22:15 UTC (permalink / raw)
To: QEMU-devel Developers; +Cc: Scott Wood, Edgar E. Iglesias, Liu Yu, Paul Brook
In a global effort to get rid of KVM-only targets, this is the next
important piece of the puzzle: e500 emulation :).
We had support for running an e500 KVM guest for a while now, but the
code could not be tested without a real e500 machine, because it required
KVM to work. This patchset adds emulation for the e500 MMU, enabling
anyone to use the MPC8544DS emulation.
v1 -> v2:
- fix linux-user build
- optimize tlb invalidate & search
v2 -> v3:
- add qdev patch (enables -drive if=virtio)
- fix mpc initial tlb size comment
- enable cpu reset
v3 -> v4:
- remove tlb_nbs
- rename BOOKE_FSL to BOOKE206
- generalize implementation to be extensible for future MMUs
- check if tsize should be set
- check if iprot should be set
- set RPN on tlb miss
- implement tlb_invalidate_all
- use specific helper to set PIDs
- create generic booke206 tlb flushing function
- drop base_addr
- new patch: MPC7544DS: Use new TLB helper function
v4 -> v5:
- dont check iprot during tlb flush on reset (scott)
- model qdev conversion similar to versatilepb (pbrook)
v5 -> v6:
- use dynamically allocated boot_info struct (blue)
- implement rA for tlbsx (scott)
- use qdev.vmsd for vmstate registration (pbrook)
Alexander Graf (7):
PPC: Make MPC8544DS obey -cpu switch
PPC: Make MPC8544DS emulation work w/o KVM
PPC: Add GS MSR definition
PPC: Add another 64 bits to instruction feature mask
PPC: Implement e500 (FSL) MMU
PPC MPC7544DS: Use new TLB helper function
PPC: Qdev'ify e500 pci
hw/ppce500.h | 22 ---
hw/ppce500_mpc8544ds.c | 113 ++++++++++++----
hw/ppce500_pci.c | 136 +++++++++++---------
target-ppc/cpu.h | 307 ++++++++++++++++++++++++++++++++++++++++++-
target-ppc/helper.c | 269 ++++++++++++++++++++++++++++++--------
target-ppc/helper.h | 6 +
target-ppc/op_helper.c | 296 +++++++++++++++++++++++++++++++++++++++++
target-ppc/translate.c | 120 +++++++++++++++--
target-ppc/translate_init.c | 282 ++++++++++++++++++++++++++++-----------
9 files changed, 1293 insertions(+), 258 deletions(-)
delete mode 100644 hw/ppce500.h
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci
2011-05-09 22:15 [Qemu-devel] [PATCH 0/7] PPC: Add FSL (e500) MMU emulation v6 Alexander Graf
@ 2011-05-09 22:15 ` Alexander Graf
0 siblings, 0 replies; 9+ messages in thread
From: Alexander Graf @ 2011-05-09 22:15 UTC (permalink / raw)
To: QEMU-devel Developers; +Cc: Scott Wood, Edgar E. Iglesias, Liu Yu, Paul Brook
The e500 PCI controller isn't qdev'ified yet. This leads to severe issues
when running with -drive.
To be able to use a virtio disk with an e500 VM, let's convert the PCI
controller over to qdev.
Reviewed-by: Paul Brook <paul@codesourcery.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
---
v2 -> v3:
- rebase to current code base
- fix endian issue
- use sysbus helpers
v3 -> v4:
- drop base_addr
v4 -> v5:
- model qdev conversion similar to versatilepb (pbrook)
v5 -> v6:
- use qdev.vmsd for vmstate registration (pbrook)
---
hw/ppce500.h | 22 --------
hw/ppce500_mpc8544ds.c | 16 +++---
hw/ppce500_pci.c | 136 +++++++++++++++++++++++++++---------------------
3 files changed, 84 insertions(+), 90 deletions(-)
delete mode 100644 hw/ppce500.h
diff --git a/hw/ppce500.h b/hw/ppce500.h
deleted file mode 100644
index 24d49bb..0000000
--- a/hw/ppce500.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * QEMU PowerPC E500 emulation shared definitions
- *
- * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
- *
- * Author: Yu Liu, <yu.liu@freescale.com>
- *
- * This file is derived from hw/ppc440.h
- * the copyright for that material belongs to the original owners.
- *
- * This is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#if !defined(PPC_E500_H)
-#define PPC_E500_H
-
-PCIBus *ppce500_pci_init(qemu_irq *pic, target_phys_addr_t registers);
-
-#endif /* !defined(PPC_E500_H) */
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 96c37df..17b0165 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -29,9 +29,9 @@
#include "device_tree.h"
#include "openpic.h"
#include "ppc.h"
-#include "ppce500.h"
#include "loader.h"
#include "elf.h"
+#include "sysbus.h"
#define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb"
#define UIMAGE_LOAD_BASE 0
@@ -222,7 +222,8 @@ static void mpc8544ds_init(ram_addr_t ram_size,
target_long initrd_size=0;
int i=0;
unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
- qemu_irq *irqs, *mpic, *pci_irqs;
+ qemu_irq *irqs, *mpic;
+ DeviceState *dev;
struct boot_info *boot_info;
/* Setup CPU */
@@ -270,12 +271,11 @@ static void mpc8544ds_init(ram_addr_t ram_size,
}
/* PCI */
- pci_irqs = qemu_malloc(sizeof(qemu_irq) * 4);
- pci_irqs[0] = mpic[pci_irq_nrs[0]];
- pci_irqs[1] = mpic[pci_irq_nrs[1]];
- pci_irqs[2] = mpic[pci_irq_nrs[2]];
- pci_irqs[3] = mpic[pci_irq_nrs[3]];
- pci_bus = ppce500_pci_init(pci_irqs, MPC8544_PCI_REGS_BASE);
+ dev = sysbus_create_varargs("e500-pcihost", MPC8544_PCI_REGS_BASE,
+ mpic[pci_irq_nrs[0]], mpic[pci_irq_nrs[1]],
+ mpic[pci_irq_nrs[2]], mpic[pci_irq_nrs[3]],
+ NULL);
+ pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
if (!pci_bus)
printf("couldn't create PCI controller!\n");
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index 83a20e4..069af96 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -15,7 +15,6 @@
*/
#include "hw.h"
-#include "ppce500.h"
#include "pci.h"
#include "pci_host.h"
#include "bswap.h"
@@ -29,7 +28,8 @@
#define PCIE500_CFGADDR 0x0
#define PCIE500_CFGDATA 0x4
#define PCIE500_REG_BASE 0xC00
-#define PCIE500_REG_SIZE (0x1000 - PCIE500_REG_BASE)
+#define PCIE500_ALL_SIZE 0x1000
+#define PCIE500_REG_SIZE (PCIE500_ALL_SIZE - PCIE500_REG_BASE)
#define PPCE500_PCI_CONFIG_ADDR 0x0
#define PPCE500_PCI_CONFIG_DATA 0x4
@@ -73,11 +73,15 @@ struct pci_inbound {
};
struct PPCE500PCIState {
+ PCIHostState pci_state;
struct pci_outbound pob[PPCE500_PCI_NR_POBS];
struct pci_inbound pib[PPCE500_PCI_NR_PIBS];
uint32_t gasket_time;
- PCIHostState pci_state;
- PCIDevice *pci_dev;
+ qemu_irq irq[4];
+ /* mmio maps */
+ int cfgaddr;
+ int cfgdata;
+ int reg;
};
typedef struct PPCE500PCIState PPCE500PCIState;
@@ -250,7 +254,6 @@ static const VMStateDescription vmstate_ppce500_pci = {
.minimum_version_id = 1,
.minimum_version_id_old = 1,
.fields = (VMStateField[]) {
- VMSTATE_PCI_DEVICE_POINTER(pci_dev, PPCE500PCIState),
VMSTATE_STRUCT_ARRAY(pob, PPCE500PCIState, PPCE500_PCI_NR_POBS, 1,
vmstate_pci_outbound, struct pci_outbound),
VMSTATE_STRUCT_ARRAY(pib, PPCE500PCIState, PPCE500_PCI_NR_PIBS, 1,
@@ -260,60 +263,73 @@ static const VMStateDescription vmstate_ppce500_pci = {
}
};
-PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers)
+static void e500_pci_map(SysBusDevice *dev, target_phys_addr_t base)
+{
+ PCIHostState *h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev));
+ PPCE500PCIState *s = DO_UPCAST(PPCE500PCIState, pci_state, h);
+
+ cpu_register_physical_memory(base + PCIE500_CFGADDR, 4, s->cfgaddr);
+ cpu_register_physical_memory(base + PCIE500_CFGDATA, 4, s->cfgdata);
+ cpu_register_physical_memory(base + PCIE500_REG_BASE, PCIE500_REG_SIZE,
+ s->reg);
+}
+
+static int e500_pcihost_initfn(SysBusDevice *dev)
+{
+ PCIHostState *h;
+ PPCE500PCIState *s;
+ PCIBus *b;
+ int i;
+
+ h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev));
+ s = DO_UPCAST(PPCE500PCIState, pci_state, h);
+
+ for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
+ sysbus_init_irq(dev, &s->irq[i]);
+ }
+
+ b = pci_register_bus(&s->pci_state.busdev.qdev, NULL, mpc85xx_pci_set_irq,
+ mpc85xx_pci_map_irq, s->irq, PCI_DEVFN(0x11, 0), 4);
+ s->pci_state.bus = b;
+
+ pci_create_simple(b, 0, "e500-host-bridge");
+
+ s->cfgaddr = pci_host_conf_register_mmio(&s->pci_state, DEVICE_BIG_ENDIAN);
+ s->cfgdata = pci_host_data_register_mmio(&s->pci_state,
+ DEVICE_LITTLE_ENDIAN);
+ s->reg = cpu_register_io_memory(e500_pci_reg_read, e500_pci_reg_write, s,
+ DEVICE_BIG_ENDIAN);
+ sysbus_init_mmio_cb(dev, PCIE500_ALL_SIZE, e500_pci_map);
+
+ return 0;
+}
+
+static int e500_host_bridge_initfn(PCIDevice *dev)
+{
+ pci_config_set_vendor_id(dev->config, PCI_VENDOR_ID_FREESCALE);
+ pci_config_set_device_id(dev->config, PCI_DEVICE_ID_MPC8533E);
+ pci_config_set_class(dev->config, PCI_CLASS_PROCESSOR_POWERPC);
+
+ return 0;
+}
+
+static PCIDeviceInfo e500_host_bridge_info = {
+ .qdev.name = "e500-host-bridge",
+ .qdev.desc = "Host bridge",
+ .qdev.size = sizeof(PCIDevice),
+ .init = e500_host_bridge_initfn,
+};
+
+static SysBusDeviceInfo e500_pcihost_info = {
+ .init = e500_pcihost_initfn,
+ .qdev.name = "e500-pcihost",
+ .qdev.size = sizeof(PPCE500PCIState),
+ .qdev.vmsd = &vmstate_ppce500_pci,
+};
+
+static void e500_pci_register(void)
{
- PPCE500PCIState *controller;
- PCIDevice *d;
- int index;
- static int ppce500_pci_id;
-
- controller = qemu_mallocz(sizeof(PPCE500PCIState));
-
- controller->pci_state.bus = pci_register_bus(NULL, "pci",
- mpc85xx_pci_set_irq,
- mpc85xx_pci_map_irq,
- pci_irqs, PCI_DEVFN(0x11, 0),
- 4);
- d = pci_register_device(controller->pci_state.bus,
- "host bridge", sizeof(PCIDevice),
- 0, NULL, NULL);
-
- pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_FREESCALE);
- pci_config_set_device_id(d->config, PCI_DEVICE_ID_MPC8533E);
- pci_config_set_class(d->config, PCI_CLASS_PROCESSOR_POWERPC);
-
- controller->pci_dev = d;
-
- /* CFGADDR */
- index = pci_host_conf_register_mmio(&controller->pci_state,
- DEVICE_BIG_ENDIAN);
- if (index < 0)
- goto free;
- cpu_register_physical_memory(registers + PCIE500_CFGADDR, 4, index);
-
- /* CFGDATA */
- index = pci_host_data_register_mmio(&controller->pci_state,
- DEVICE_BIG_ENDIAN);
- if (index < 0)
- goto free;
- cpu_register_physical_memory(registers + PCIE500_CFGDATA, 4, index);
-
- index = cpu_register_io_memory(e500_pci_reg_read,
- e500_pci_reg_write, controller,
- DEVICE_NATIVE_ENDIAN);
- if (index < 0)
- goto free;
- cpu_register_physical_memory(registers + PCIE500_REG_BASE,
- PCIE500_REG_SIZE, index);
-
- /* XXX load/save code not tested. */
- vmstate_register(&d->qdev, ppce500_pci_id++, &vmstate_ppce500_pci,
- controller);
-
- return controller->pci_state.bus;
-
-free:
- printf("%s error\n", __func__);
- qemu_free(controller);
- return NULL;
+ sysbus_register_withprop(&e500_pcihost_info);
+ pci_qdev_register(&e500_host_bridge_info);
}
+device_init(e500_pci_register);
--
1.6.0.2
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Qemu-devel] [PATCH 0/7] PPC: Add FSL (e500) MMU emulation v5
@ 2011-05-07 23:00 Alexander Graf
2011-05-07 23:00 ` [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci Alexander Graf
0 siblings, 1 reply; 9+ messages in thread
From: Alexander Graf @ 2011-05-07 23:00 UTC (permalink / raw)
To: QEMU-devel Developers; +Cc: Scott Wood, Edgar E. Iglesias, Liu Yu, Paul Brook
In a global effort to get rid of KVM-only targets, this is the next
important piece of the puzzle: e500 emulation :).
We had support for running an e500 KVM guest for a while now, but the
code could not be tested without a real e500 machine, because it required
KVM to work. This patchset adds emulation for the e500 MMU, enabling
anyone to use the MPC8544DS emulation.
v1 -> v2:
- fix linux-user build
- optimize tlb invalidate & search
v2 -> v3:
- add qdev patch (enables -drive if=virtio)
- fix mpc initial tlb size comment
- enable cpu reset
v3 -> v4:
- remove tlb_nbs
- rename BOOKE_FSL to BOOKE206
- generalize implementation to be extensible for future MMUs
- check if tsize should be set
- check if iprot should be set
- set RPN on tlb miss
- implement tlb_invalidate_all
- use specific helper to set PIDs
- create generic booke206 tlb flushing function
- drop base_addr
- new patch: MPC7544DS: Use new TLB helper function
v4 -> v5:
- dont check iprot during tlb flush on reset (scott)
- model qdev conversion similar to versatilepb (pbrook)
Alexander Graf (7):
PPC: Make MPC8544DS obey -cpu switch
PPC: Make MPC8544DS emulation work w/o KVM
PPC: Add GS MSR definition
PPC: Add another 64 bits to instruction feature mask
PPC: Implement e500 (FSL) MMU
PPC MPC7544DS: Use new TLB helper function
PPC: Qdev'ify e500 pci
hw/ppce500.h | 22 ---
hw/ppce500_mpc8544ds.c | 108 ++++++++++++----
hw/ppce500_pci.c | 122 ++++++++++--------
target-ppc/cpu.h | 307 ++++++++++++++++++++++++++++++++++++++++++-
target-ppc/helper.c | 269 ++++++++++++++++++++++++++++++--------
target-ppc/helper.h | 6 +
target-ppc/op_helper.c | 296 +++++++++++++++++++++++++++++++++++++++++
target-ppc/translate.c | 118 +++++++++++++++--
target-ppc/translate_init.c | 282 ++++++++++++++++++++++++++++-----------
9 files changed, 1280 insertions(+), 250 deletions(-)
delete mode 100644 hw/ppce500.h
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci
2011-05-07 23:00 [Qemu-devel] [PATCH 0/7] PPC: Add FSL (e500) MMU emulation v5 Alexander Graf
@ 2011-05-07 23:00 ` Alexander Graf
2011-05-07 23:48 ` Paul Brook
0 siblings, 1 reply; 9+ messages in thread
From: Alexander Graf @ 2011-05-07 23:00 UTC (permalink / raw)
To: QEMU-devel Developers; +Cc: Scott Wood, Edgar E. Iglesias, Liu Yu, Paul Brook
The e500 PCI controller isn't qdev'ified yet. This leads to severe issues
when running with -drive.
To be able to use a virtio disk with an e500 VM, let's convert the PCI
controller over to qdev.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
v2 -> v3:
- rebase to current code base
- fix endian issue
- use sysbus helpers
v3 -> v4:
- drop base_addr
v4 -> v5:
- model qdev conversion similar to versatilepb (pbrook)
---
hw/ppce500.h | 22 ---------
hw/ppce500_mpc8544ds.c | 16 +++---
hw/ppce500_pci.c | 122 +++++++++++++++++++++++++++---------------------
3 files changed, 76 insertions(+), 84 deletions(-)
delete mode 100644 hw/ppce500.h
diff --git a/hw/ppce500.h b/hw/ppce500.h
deleted file mode 100644
index 24d49bb..0000000
--- a/hw/ppce500.h
+++ /dev/null
@@ -1,22 +0,0 @@
-/*
- * QEMU PowerPC E500 emulation shared definitions
- *
- * Copyright (C) 2009 Freescale Semiconductor, Inc. All rights reserved.
- *
- * Author: Yu Liu, <yu.liu@freescale.com>
- *
- * This file is derived from hw/ppc440.h
- * the copyright for that material belongs to the original owners.
- *
- * This is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#if !defined(PPC_E500_H)
-#define PPC_E500_H
-
-PCIBus *ppce500_pci_init(qemu_irq *pic, target_phys_addr_t registers);
-
-#endif /* !defined(PPC_E500_H) */
diff --git a/hw/ppce500_mpc8544ds.c b/hw/ppce500_mpc8544ds.c
index 4120977..f92d07e 100644
--- a/hw/ppce500_mpc8544ds.c
+++ b/hw/ppce500_mpc8544ds.c
@@ -29,9 +29,9 @@
#include "device_tree.h"
#include "openpic.h"
#include "ppc.h"
-#include "ppce500.h"
#include "loader.h"
#include "elf.h"
+#include "sysbus.h"
#define BINARY_DEVICE_TREE_FILE "mpc8544ds.dtb"
#define UIMAGE_LOAD_BASE 0
@@ -222,7 +222,8 @@ static void mpc8544ds_init(ram_addr_t ram_size,
target_long initrd_size=0;
int i=0;
unsigned int pci_irq_nrs[4] = {1, 2, 3, 4};
- qemu_irq *irqs, *mpic, *pci_irqs;
+ qemu_irq *irqs, *mpic;
+ DeviceState *dev;
/* Setup CPU */
if (cpu_model == NULL) {
@@ -269,12 +270,11 @@ static void mpc8544ds_init(ram_addr_t ram_size,
}
/* PCI */
- pci_irqs = qemu_malloc(sizeof(qemu_irq) * 4);
- pci_irqs[0] = mpic[pci_irq_nrs[0]];
- pci_irqs[1] = mpic[pci_irq_nrs[1]];
- pci_irqs[2] = mpic[pci_irq_nrs[2]];
- pci_irqs[3] = mpic[pci_irq_nrs[3]];
- pci_bus = ppce500_pci_init(pci_irqs, MPC8544_PCI_REGS_BASE);
+ dev = sysbus_create_varargs("e500-pcihost", MPC8544_PCI_REGS_BASE,
+ mpic[pci_irq_nrs[0]], mpic[pci_irq_nrs[1]],
+ mpic[pci_irq_nrs[2]], mpic[pci_irq_nrs[3]],
+ NULL);
+ pci_bus = (PCIBus *)qdev_get_child_bus(dev, "pci");
if (!pci_bus)
printf("couldn't create PCI controller!\n");
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index 83a20e4..67d2055 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -15,7 +15,6 @@
*/
#include "hw.h"
-#include "ppce500.h"
#include "pci.h"
#include "pci_host.h"
#include "bswap.h"
@@ -29,7 +28,8 @@
#define PCIE500_CFGADDR 0x0
#define PCIE500_CFGDATA 0x4
#define PCIE500_REG_BASE 0xC00
-#define PCIE500_REG_SIZE (0x1000 - PCIE500_REG_BASE)
+#define PCIE500_ALL_SIZE 0x1000
+#define PCIE500_REG_SIZE (PCIE500_ALL_SIZE - PCIE500_REG_BASE)
#define PPCE500_PCI_CONFIG_ADDR 0x0
#define PPCE500_PCI_CONFIG_DATA 0x4
@@ -73,11 +73,15 @@ struct pci_inbound {
};
struct PPCE500PCIState {
+ PCIHostState pci_state;
struct pci_outbound pob[PPCE500_PCI_NR_POBS];
struct pci_inbound pib[PPCE500_PCI_NR_PIBS];
uint32_t gasket_time;
- PCIHostState pci_state;
- PCIDevice *pci_dev;
+ qemu_irq irq[4];
+ /* mmio maps */
+ int cfgaddr;
+ int cfgdata;
+ int reg;
};
typedef struct PPCE500PCIState PPCE500PCIState;
@@ -250,7 +254,6 @@ static const VMStateDescription vmstate_ppce500_pci = {
.minimum_version_id = 1,
.minimum_version_id_old = 1,
.fields = (VMStateField[]) {
- VMSTATE_PCI_DEVICE_POINTER(pci_dev, PPCE500PCIState),
VMSTATE_STRUCT_ARRAY(pob, PPCE500PCIState, PPCE500_PCI_NR_POBS, 1,
vmstate_pci_outbound, struct pci_outbound),
VMSTATE_STRUCT_ARRAY(pib, PPCE500PCIState, PPCE500_PCI_NR_PIBS, 1,
@@ -260,60 +263,71 @@ static const VMStateDescription vmstate_ppce500_pci = {
}
};
-PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers)
+static void e500_pci_map(SysBusDevice *dev, target_phys_addr_t base)
+{
+ PCIHostState *h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev));
+ PPCE500PCIState *s = DO_UPCAST(PPCE500PCIState, pci_state, h);
+
+ cpu_register_physical_memory(base + PCIE500_CFGADDR, 4, s->cfgaddr);
+ cpu_register_physical_memory(base + PCIE500_CFGDATA, 4, s->cfgdata);
+ cpu_register_physical_memory(base + PCIE500_REG_BASE, PCIE500_REG_SIZE,
+ s->reg);
+}
+
+static int e500_pcihost_initfn(SysBusDevice *dev)
{
- PPCE500PCIState *controller;
- PCIDevice *d;
- int index;
static int ppce500_pci_id;
+ PCIHostState *h;
+ PPCE500PCIState *s;
+ PCIBus *b;
+ int i;
+
+ h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev));
+ s = DO_UPCAST(PPCE500PCIState, pci_state, h);
+
+ for (i = 0; i < ARRAY_SIZE(s->irq); i++) {
+ sysbus_init_irq(dev, &s->irq[i]);
+ }
+
+ b = pci_register_bus(&s->pci_state.busdev.qdev, NULL, mpc85xx_pci_set_irq,
+ mpc85xx_pci_map_irq, s->irq, PCI_DEVFN(0x11, 0), 4);
+ s->pci_state.bus = b;
- controller = qemu_mallocz(sizeof(PPCE500PCIState));
-
- controller->pci_state.bus = pci_register_bus(NULL, "pci",
- mpc85xx_pci_set_irq,
- mpc85xx_pci_map_irq,
- pci_irqs, PCI_DEVFN(0x11, 0),
- 4);
- d = pci_register_device(controller->pci_state.bus,
- "host bridge", sizeof(PCIDevice),
- 0, NULL, NULL);
-
- pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_FREESCALE);
- pci_config_set_device_id(d->config, PCI_DEVICE_ID_MPC8533E);
- pci_config_set_class(d->config, PCI_CLASS_PROCESSOR_POWERPC);
-
- controller->pci_dev = d;
-
- /* CFGADDR */
- index = pci_host_conf_register_mmio(&controller->pci_state,
- DEVICE_BIG_ENDIAN);
- if (index < 0)
- goto free;
- cpu_register_physical_memory(registers + PCIE500_CFGADDR, 4, index);
-
- /* CFGDATA */
- index = pci_host_data_register_mmio(&controller->pci_state,
- DEVICE_BIG_ENDIAN);
- if (index < 0)
- goto free;
- cpu_register_physical_memory(registers + PCIE500_CFGDATA, 4, index);
-
- index = cpu_register_io_memory(e500_pci_reg_read,
- e500_pci_reg_write, controller,
- DEVICE_NATIVE_ENDIAN);
- if (index < 0)
- goto free;
- cpu_register_physical_memory(registers + PCIE500_REG_BASE,
- PCIE500_REG_SIZE, index);
+ pci_create_simple(b, 0, "e500-host-bridge");
+
+ s->cfgaddr = pci_host_conf_register_mmio(&s->pci_state, DEVICE_BIG_ENDIAN);
+ s->cfgdata = pci_host_data_register_mmio(&s->pci_state,
+ DEVICE_LITTLE_ENDIAN);
+ s->reg = cpu_register_io_memory(e500_pci_reg_read, e500_pci_reg_write, s,
+ DEVICE_BIG_ENDIAN);
+ sysbus_init_mmio_cb(dev, PCIE500_ALL_SIZE, e500_pci_map);
/* XXX load/save code not tested. */
- vmstate_register(&d->qdev, ppce500_pci_id++, &vmstate_ppce500_pci,
- controller);
+ vmstate_register(&dev->qdev, ppce500_pci_id++, &vmstate_ppce500_pci, s);
- return controller->pci_state.bus;
+ return 0;
+}
-free:
- printf("%s error\n", __func__);
- qemu_free(controller);
- return NULL;
+static int e500_host_bridge_initfn(PCIDevice *dev)
+{
+ pci_config_set_vendor_id(dev->config, PCI_VENDOR_ID_FREESCALE);
+ pci_config_set_device_id(dev->config, PCI_DEVICE_ID_MPC8533E);
+ pci_config_set_class(dev->config, PCI_CLASS_PROCESSOR_POWERPC);
+
+ return 0;
+}
+
+static PCIDeviceInfo e500_host_bridge_info = {
+ .qdev.name = "e500-host-bridge",
+ .qdev.desc = "Host bridge",
+ .qdev.size = sizeof(PCIDevice),
+ .init = e500_host_bridge_initfn,
+};
+
+static void e500_pci_register(void)
+{
+ sysbus_register_dev("e500-pcihost", sizeof(PPCE500PCIState),
+ e500_pcihost_initfn);
+ pci_qdev_register(&e500_host_bridge_info);
}
+device_init(e500_pci_register);
--
1.6.0.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci
2011-05-07 23:00 ` [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci Alexander Graf
@ 2011-05-07 23:48 ` Paul Brook
2011-05-07 23:58 ` Alexander Graf
0 siblings, 1 reply; 9+ messages in thread
From: Paul Brook @ 2011-05-07 23:48 UTC (permalink / raw)
To: qemu-devel; +Cc: Scott Wood, Edgar E. Iglesias, Liu Yu, Alexander Graf
> @@ -250,7 +254,6 @@ static const VMStateDescription vmstate_ppce500_pci = {
>
> .minimum_version_id = 1,
> .minimum_version_id_old = 1,
> .fields = (VMStateField[]) {
>
> - VMSTATE_PCI_DEVICE_POINTER(pci_dev, PPCE500PCIState),
Doesn't this require incrementing version_id?
> + vmstate_register(&dev->qdev, ppce500_pci_id++, &vmstate_ppce500_pci,
ppce500_pci_id is bogus, and should be removed.
You probably shouldn't be calling this at all. Instead use
sysbus_register_withprop and qdev.vmsd.
Other than that, this patch looks ok.
Paul
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci
2011-05-07 23:48 ` Paul Brook
@ 2011-05-07 23:58 ` Alexander Graf
0 siblings, 0 replies; 9+ messages in thread
From: Alexander Graf @ 2011-05-07 23:58 UTC (permalink / raw)
To: Paul Brook; +Cc: Scott Wood, Edgar E. Iglesias, Liu Yu, qemu-devel
On 08.05.2011, at 01:48, Paul Brook wrote:
>> @@ -250,7 +254,6 @@ static const VMStateDescription vmstate_ppce500_pci = {
>>
>> .minimum_version_id = 1,
>> .minimum_version_id_old = 1,
>> .fields = (VMStateField[]) {
>>
>> - VMSTATE_PCI_DEVICE_POINTER(pci_dev, PPCE500PCIState),
>
> Doesn't this require incrementing version_id?
It's never worked before and there is no known good state - so I don't think there's any need to increment here whatsoever :). There won't be any old users.
>
>> + vmstate_register(&dev->qdev, ppce500_pci_id++, &vmstate_ppce500_pci,
>
> ppce500_pci_id is bogus, and should be removed.
> You probably shouldn't be calling this at all. Instead use
> sysbus_register_withprop and qdev.vmsd.
>
> Other than that, this patch looks ok.
Alrighty, new patch underway.
Alex
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Qemu-devel] [PATCH 0/7] PPC: Add FSL (e500) MMU emulation v4
@ 2011-05-06 12:00 Alexander Graf
2011-05-06 12:00 ` [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci Alexander Graf
0 siblings, 1 reply; 9+ messages in thread
From: Alexander Graf @ 2011-05-06 12:00 UTC (permalink / raw)
To: QEMU-devel Developers; +Cc: Scott Wood, Edgar E. Iglesias, Liu Yu
In a global effort to get rid of KVM-only targets, this is the next
important piece of the puzzle: e500 emulation :).
We had support for running an e500 KVM guest for a while now, but the
code could not be tested without a real e500 machine, because it required
KVM to work. This patchset adds emulation for the e500 MMU, enabling
anyone to use the MPC8544DS emulation.
v1 -> v2:
- fix linux-user build
- optimize tlb invalidate & search
v2 -> v3:
- add qdev patch (enables -drive if=virtio)
- fix mpc initial tlb size comment
- enable cpu reset
v3 -> v4:
- remove tlb_nbs
- rename BOOKE_FSL to BOOKE206
- generalize implementation to be extensible for future MMUs
- check if tsize should be set
- check if iprot should be set
- set RPN on tlb miss
- implement tlb_invalidate_all
- use specific helper to set PIDs
- create generic booke206 tlb flushing function
- drop base_addr
- new patch: MPC7544DS: Use new TLB helper function
Alexander Graf (7):
PPC: Make MPC8544DS obey -cpu switch
PPC: Make MPC8544DS emulation work w/o KVM
PPC: Add GS MSR definition
PPC: Add another 64 bits to instruction feature mask
PPC: Implement e500 (FSL) MMU
PPC MPC7544DS: Use new TLB helper function
PPC: Qdev'ify e500 pci
hw/ppce500_mpc8544ds.c | 92 +++++++++++---
hw/ppce500_pci.c | 111 ++++++++++------
target-ppc/cpu.h | 307 ++++++++++++++++++++++++++++++++++++++++++-
target-ppc/helper.c | 277 +++++++++++++++++++++++++++++++--------
target-ppc/helper.h | 6 +
target-ppc/op_helper.c | 296 +++++++++++++++++++++++++++++++++++++++++
target-ppc/translate.c | 116 +++++++++++++++--
target-ppc/translate_init.c | 282 ++++++++++++++++++++++++++++-----------
8 files changed, 1282 insertions(+), 205 deletions(-)
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci
2011-05-06 12:00 [Qemu-devel] [PATCH 0/7] PPC: Add FSL (e500) MMU emulation v4 Alexander Graf
@ 2011-05-06 12:00 ` Alexander Graf
2011-05-06 14:36 ` Paul Brook
0 siblings, 1 reply; 9+ messages in thread
From: Alexander Graf @ 2011-05-06 12:00 UTC (permalink / raw)
To: QEMU-devel Developers; +Cc: Scott Wood, Edgar E. Iglesias, Liu Yu
The e500 PCI controller isn't qdev'ified yet. This leads to severe issues
when running with -drive.
To be able to use a virtio disk with an e500 VM, let's convert the PCI
controller over to qdev.
Signed-off-by: Alexander Graf <agraf@suse.de>
---
v2 -> v3:
- rebase to current code base
- fix endian issue
- use sysbus helpers
v3 -> v4:
- drop base_addr
---
hw/ppce500_pci.c | 111 +++++++++++++++++++++++++++++++++++-------------------
1 files changed, 72 insertions(+), 39 deletions(-)
diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c
index 83a20e4..f3db0a7 100644
--- a/hw/ppce500_pci.c
+++ b/hw/ppce500_pci.c
@@ -73,11 +73,10 @@ struct pci_inbound {
};
struct PPCE500PCIState {
+ PCIHostState pci_state;
struct pci_outbound pob[PPCE500_PCI_NR_POBS];
struct pci_inbound pib[PPCE500_PCI_NR_PIBS];
uint32_t gasket_time;
- PCIHostState pci_state;
- PCIDevice *pci_dev;
};
typedef struct PPCE500PCIState PPCE500PCIState;
@@ -250,7 +249,6 @@ static const VMStateDescription vmstate_ppce500_pci = {
.minimum_version_id = 1,
.minimum_version_id_old = 1,
.fields = (VMStateField[]) {
- VMSTATE_PCI_DEVICE_POINTER(pci_dev, PPCE500PCIState),
VMSTATE_STRUCT_ARRAY(pob, PPCE500PCIState, PPCE500_PCI_NR_POBS, 1,
vmstate_pci_outbound, struct pci_outbound),
VMSTATE_STRUCT_ARRAY(pib, PPCE500PCIState, PPCE500_PCI_NR_PIBS, 1,
@@ -262,58 +260,93 @@ static const VMStateDescription vmstate_ppce500_pci = {
PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t registers)
{
- PPCE500PCIState *controller;
+ DeviceState *dev;
+ PCIBus *b;
+ PCIHostState *h;
+ PPCE500PCIState *s;
PCIDevice *d;
- int index;
static int ppce500_pci_id;
+ SysBusDevice *sb;
+
+ dev = qdev_create(NULL, "e500-pcihost");
+ sb = sysbus_from_qdev(dev);
+ h = FROM_SYSBUS(PCIHostState, sb);
+ s = DO_UPCAST(PPCE500PCIState, pci_state, h);
+
+ b = pci_register_bus(&s->pci_state.busdev.qdev, NULL, mpc85xx_pci_set_irq,
+ mpc85xx_pci_map_irq, pci_irqs, PCI_DEVFN(0x11, 0), 4);
- controller = qemu_mallocz(sizeof(PPCE500PCIState));
+ s->pci_state.bus = b;
+ qdev_init_nofail(dev);
+ d = pci_create_simple(b, 0, "e500-host-bridge");
- controller->pci_state.bus = pci_register_bus(NULL, "pci",
- mpc85xx_pci_set_irq,
- mpc85xx_pci_map_irq,
- pci_irqs, PCI_DEVFN(0x11, 0),
- 4);
- d = pci_register_device(controller->pci_state.bus,
- "host bridge", sizeof(PCIDevice),
- 0, NULL, NULL);
+ sysbus_mmio_map(sb, 0, registers + PCIE500_CFGADDR);
+ sysbus_mmio_map(sb, 1, registers + PCIE500_CFGDATA);
+ sysbus_mmio_map(sb, 2, registers + PCIE500_REG_BASE);
- pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_FREESCALE);
- pci_config_set_device_id(d->config, PCI_DEVICE_ID_MPC8533E);
- pci_config_set_class(d->config, PCI_CLASS_PROCESSOR_POWERPC);
+ /* XXX load/save code not tested. */
+ vmstate_register(&d->qdev, ppce500_pci_id++, &vmstate_ppce500_pci, s);
+
+ return b;
+}
+
+static int e500_pcihost_initfn(SysBusDevice *dev)
+{
+ PCIHostState *h;
+ PPCE500PCIState *s;
+ /* XXX qdev var */
+ int index;
- controller->pci_dev = d;
+ h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev));
+ s = DO_UPCAST(PPCE500PCIState, pci_state, h);
/* CFGADDR */
- index = pci_host_conf_register_mmio(&controller->pci_state,
- DEVICE_BIG_ENDIAN);
+ index = pci_host_conf_register_mmio(&s->pci_state, DEVICE_BIG_ENDIAN);
if (index < 0)
- goto free;
- cpu_register_physical_memory(registers + PCIE500_CFGADDR, 4, index);
+ return -1;
+ sysbus_init_mmio(dev, 4, index);
/* CFGDATA */
- index = pci_host_data_register_mmio(&controller->pci_state,
- DEVICE_BIG_ENDIAN);
+ index = pci_host_data_register_mmio(&s->pci_state, DEVICE_LITTLE_ENDIAN);
if (index < 0)
- goto free;
- cpu_register_physical_memory(registers + PCIE500_CFGDATA, 4, index);
+ return -1;
+ sysbus_init_mmio(dev, 4, index);
index = cpu_register_io_memory(e500_pci_reg_read,
- e500_pci_reg_write, controller,
- DEVICE_NATIVE_ENDIAN);
+ e500_pci_reg_write, s, DEVICE_BIG_ENDIAN);
if (index < 0)
- goto free;
- cpu_register_physical_memory(registers + PCIE500_REG_BASE,
- PCIE500_REG_SIZE, index);
+ return -1;
+ sysbus_init_mmio(dev, PCIE500_REG_SIZE, index);
+ return 0;
+}
- /* XXX load/save code not tested. */
- vmstate_register(&d->qdev, ppce500_pci_id++, &vmstate_ppce500_pci,
- controller);
+static int e500_host_bridge_initfn(PCIDevice *dev)
+{
+ pci_config_set_vendor_id(dev->config, PCI_VENDOR_ID_FREESCALE);
+ pci_config_set_device_id(dev->config, PCI_DEVICE_ID_MPC8533E);
+ pci_config_set_class(dev->config, PCI_CLASS_PROCESSOR_POWERPC);
+
+ return 0;
+}
- return controller->pci_state.bus;
+static PCIDeviceInfo e500_host_bridge_info = {
+ .qdev.name = "e500-host-bridge",
+ .qdev.desc = "Host bridge",
+ .qdev.size = sizeof(PCIDevice),
+ .qdev.no_user = 1,
+ .init = e500_host_bridge_initfn,
+};
-free:
- printf("%s error\n", __func__);
- qemu_free(controller);
- return NULL;
+static SysBusDeviceInfo e500_pcihost_info = {
+ .init = e500_pcihost_initfn,
+ .qdev.name = "e500-pcihost",
+ .qdev.size = sizeof(PPCE500PCIState),
+ .qdev.no_user = 1,
+};
+
+static void e500_pci_register(void)
+{
+ sysbus_register_withprop(&e500_pcihost_info);
+ pci_qdev_register(&e500_host_bridge_info);
}
+device_init(e500_pci_register);
--
1.6.0.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci
2011-05-06 12:00 ` [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci Alexander Graf
@ 2011-05-06 14:36 ` Paul Brook
2011-05-06 16:29 ` Paul Brook
0 siblings, 1 reply; 9+ messages in thread
From: Paul Brook @ 2011-05-06 14:36 UTC (permalink / raw)
To: qemu-devel; +Cc: Scott Wood, Edgar E. Iglesias, Liu Yu, Alexander Graf
> PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t
> registers) {
> - PPCE500PCIState *controller;
> + DeviceState *dev;
> + PCIBus *b;
> + PCIHostState *h;
> + PPCE500PCIState *s;
> PCIDevice *d;
> - int index;
> static int ppce500_pci_id;
> + SysBusDevice *sb;
> +
> + dev = qdev_create(NULL, "e500-pcihost");
> + sb = sysbus_from_qdev(dev);
> + h = FROM_SYSBUS(PCIHostState, sb);
> + s = DO_UPCAST(PPCE500PCIState, pci_state, h);
> +
> + b = pci_register_bus(&s->pci_state.busdev.qdev, NULL,
No. This function should not exist. All this should be done in
e500_pcihost_initfn. Please do the qdev conversion properly.
See versatilepb.c/versatile_pci.c for an example of how this is supposed to be
done.
> + .qdev.no_user = 1,
There's no good reason for this. It indicates you did the qdev conversion
incorrectly.
Paul
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci
2011-05-06 14:36 ` Paul Brook
@ 2011-05-06 16:29 ` Paul Brook
0 siblings, 0 replies; 9+ messages in thread
From: Paul Brook @ 2011-05-06 16:29 UTC (permalink / raw)
To: qemu-devel; +Cc: Scott Wood, Edgar E. Iglesias, Liu Yu, Alexander Graf
> > PCIBus *ppce500_pci_init(qemu_irq pci_irqs[4], target_phys_addr_t
> > registers) {
> > - PPCE500PCIState *controller;
> > + DeviceState *dev;
> > + PCIBus *b;
> > + PCIHostState *h;
> > + PPCE500PCIState *s;
> >
> > PCIDevice *d;
> >
> > - int index;
> >
> > static int ppce500_pci_id;
> >
> > + SysBusDevice *sb;
> > +
> > + dev = qdev_create(NULL, "e500-pcihost");
> > + sb = sysbus_from_qdev(dev);
> > + h = FROM_SYSBUS(PCIHostState, sb);
> > + s = DO_UPCAST(PPCE500PCIState, pci_state, h);
> > +
> > + b = pci_register_bus(&s->pci_state.busdev.qdev, NULL,
>
> No. This function should not exist. All this should be done in
> e500_pcihost_initfn. Please do the qdev conversion properly.
Or more precicely it should not depend on the internals of ppce500_pci.c.
In principle the only public entry point in that file should be
device_init(...). If used by multiple boards a simple helper function may be
appropriate (e.g. smc91c111_init). Note that this helper function has no ties
to the rest of that file, and could be trivially moved into a different file
or replaced with a macro/inline funciton.
ppce500_pci_init definitely should not be creating the PCI bus.
Paul
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2011-05-09 22:15 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2011-05-08 0:01 [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci Alexander Graf
2011-05-09 13:44 ` Paul Brook
-- strict thread matches above, loose matches on Subject: below --
2011-05-09 22:15 [Qemu-devel] [PATCH 0/7] PPC: Add FSL (e500) MMU emulation v6 Alexander Graf
2011-05-09 22:15 ` [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci Alexander Graf
2011-05-07 23:00 [Qemu-devel] [PATCH 0/7] PPC: Add FSL (e500) MMU emulation v5 Alexander Graf
2011-05-07 23:00 ` [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci Alexander Graf
2011-05-07 23:48 ` Paul Brook
2011-05-07 23:58 ` Alexander Graf
2011-05-06 12:00 [Qemu-devel] [PATCH 0/7] PPC: Add FSL (e500) MMU emulation v4 Alexander Graf
2011-05-06 12:00 ` [Qemu-devel] [PATCH 7/7] PPC: Qdev'ify e500 pci Alexander Graf
2011-05-06 14:36 ` Paul Brook
2011-05-06 16:29 ` Paul Brook
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