From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:56481) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QM0Tf-0006lG-Sn for qemu-devel@nongnu.org; Mon, 16 May 2011 12:17:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QM0Tf-0003Lh-4E for qemu-devel@nongnu.org; Mon, 16 May 2011 12:17:03 -0400 Received: from mail.codesourcery.com ([38.113.113.100]:44881) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QM0Te-0003LX-OV for qemu-devel@nongnu.org; Mon, 16 May 2011 12:17:03 -0400 From: Paul Brook Date: Mon, 16 May 2011 17:16:59 +0100 References: <201105102228.37340.paul@codesourcery.com> In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <201105161716.59544.paul@codesourcery.com> Subject: Re: [Qemu-devel] TCG: AREG0 removal planning List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Blue Swirl Cc: qemu-devel > > For changes to > > the TCG side we want to consider how we can provide useful aliasing > > information, rather than a naive replacement of TCG_AREG0 with a > > variable. > > What aliasing information? Aliasing of cpu state accesses between tcg_global_mem_new_* variables, qemu_ld/st ops, and helper functions. Paul