From: "Michael S. Tsirkin" <mst@redhat.com>
To: TeLeMan <geleman@gmail.com>
Cc: qemu-trivial@nongnu.org, Isaku Yamahata <yamahata@valinux.co.jp>,
qemu-devel <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH] piix_pci: fix piix3_set_irq_pic()
Date: Sun, 22 May 2011 22:06:42 +0300 [thread overview]
Message-ID: <20110522190642.GA15285@redhat.com> (raw)
In-Reply-To: <BANLkTimVJAJL=2Jxe+qDMKPtS8CLagYhBA@mail.gmail.com>
On Mon, May 16, 2011 at 07:50:55PM +0800, TeLeMan wrote:
> If pic_irq is greater than 7, the irq level is always 0 on 32bits.
>
> Signed-off-by: TeLeMan <geleman@gmail.com>
Good catch
Acked-by: Michael S. Tsirkin <mst@redhat.com>
> ---
> hw/piix_pci.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/hw/piix_pci.c b/hw/piix_pci.c
> index 7f1c4cc..85a320e 100644
> --- a/hw/piix_pci.c
> +++ b/hw/piix_pci.c
> @@ -312,7 +312,7 @@ static void piix3_set_irq_pic(PIIX3State *piix3,
> int pic_irq)
> {
> qemu_set_irq(piix3->pic[pic_irq],
> !!(piix3->pic_levels &
> - (((1UL << PIIX_NUM_PIRQS) - 1) <<
> + (((1ULL << PIIX_NUM_PIRQS) - 1) <<
> (pic_irq * PIIX_NUM_PIRQS))));
> }
>
> --
> 1.7.3.1.msysgit.0
> --
> SUN OF A BEACH
next prev parent reply other threads:[~2011-05-22 19:06 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-05-16 11:50 [Qemu-devel] [PATCH] piix_pci: fix piix3_set_irq_pic() TeLeMan
2011-05-16 12:05 ` [Qemu-devel] [Qemu-trivial] " Stefan Hajnoczi
2011-05-22 19:06 ` Michael S. Tsirkin [this message]
2011-05-22 19:18 ` [Qemu-devel] " Stefan Weil
2011-05-23 2:36 ` Isaku Yamahata
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