Re: [Qemu-devel] [PATCH] target-i386: GPF on invalid MSRs

[Josh Triplett <josh@joshtriplett.org>]

On Thu, May 26, 2011 at 11:12:12AM +0200, Alexander Graf wrote:
> On 26.05.2011, at 11:08, Josh Triplett wrote:
> > qemu currently returns 0 for rdmsr on invalid MSRs, and ignores wrmsr on
> > invalid MSRs.  Real x86 processors GPF on invalid MSRs, which allows
> > software to detect unavailable MSRs.  Emulate this behavior correctly in
> > qemu.
> > 
> > Bug discovered via the BIOS Implementation Test Suite
> > <http://biosbits.org/>; fix tested the same way, for both 32-bit and
> > 64-bit x86.
> 
> This would break a _lot_ of guests that work just fine today, as qemu doesn't handle all the necessary MSRs.

It also fixes guests that rely on the GPF to indicate the absence of an
MSR, and assume that the lack of GPF means the availability of that MSR.
Silently returning 0 for unknown MSRs means silent breakage.

What (buggy) guests expect to use random model-specific registers
without either handling GPFs or checking the CPU model first?

What MSRs do those guests expect that qemu doesn't currently implement?

If this represents a workaround for buggy guests, then may I add an
option to control this behavior?

- Josh Triplett