* [Qemu-devel] [PATCH] Make x86 mfence and lfence illegal without SSE2
@ 2011-06-06 14:49 Martin Simmons
2011-06-07 13:56 ` Stefan Hajnoczi
0 siblings, 1 reply; 2+ messages in thread
From: Martin Simmons @ 2011-06-06 14:49 UTC (permalink / raw)
To: qemu-devel; +Cc: qemu-trivial
Hi,
While trying to use qemu -cpu pentium3 to test for incorrect uses of certain
SSE2 instructions, I found that QEMU allowed the mfence and lfence
instructions to be executed even though Pentium 3 doesn't support them.
According to the processor specs (and experience on a real Pentium 3), these
instructions are only available with SSE2, but QEMU is checking for SSE. The
check for the related sfence instruction is correct (it works with SSE).
This trival patch fixes the test:
Signed-off-by: Martin Simmons <martin@lispworks.com>
--- a/target-i386/translate.c 2011-06-03 16:17:18.270208646 +0100
+++ b/target-i386/translate.c 2011-06-03 16:02:41.381556714 +0100
@@ -7560,7 +7560,7 @@
break;
case 5: /* lfence */
case 6: /* mfence */
- if ((modrm & 0xc7) != 0xc0 || !(s->cpuid_features & CPUID_SSE))
+ if ((modrm & 0xc7) != 0xc0 || !(s->cpuid_features & CPUID_SSE2))
goto illegal_op;
break;
case 7: /* sfence / clflush */
__Martin
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH] Make x86 mfence and lfence illegal without SSE2
2011-06-06 14:49 [Qemu-devel] [PATCH] Make x86 mfence and lfence illegal without SSE2 Martin Simmons
@ 2011-06-07 13:56 ` Stefan Hajnoczi
0 siblings, 0 replies; 2+ messages in thread
From: Stefan Hajnoczi @ 2011-06-07 13:56 UTC (permalink / raw)
To: Martin Simmons; +Cc: qemu-trivial, qemu-devel
On Mon, Jun 06, 2011 at 03:49:17PM +0100, Martin Simmons wrote:
> Hi,
>
> While trying to use qemu -cpu pentium3 to test for incorrect uses of certain
> SSE2 instructions, I found that QEMU allowed the mfence and lfence
> instructions to be executed even though Pentium 3 doesn't support them.
>
> According to the processor specs (and experience on a real Pentium 3), these
> instructions are only available with SSE2, but QEMU is checking for SSE. The
> check for the related sfence instruction is correct (it works with SSE).
>
> This trival patch fixes the test:
>
> Signed-off-by: Martin Simmons <martin@lispworks.com>
Thanks, applied to the trivial patches tree:
http://repo.or.cz/w/qemu/stefanha.git/shortlog/refs/heads/trivial-patches
Stefan
^ permalink raw reply [flat|nested] 2+ messages in thread
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