From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:44558) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QUDpG-0004wk-Fm for qemu-devel@nongnu.org; Wed, 08 Jun 2011 04:09:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QUDpE-0005IR-Jl for qemu-devel@nongnu.org; Wed, 08 Jun 2011 04:09:18 -0400 Date: Wed, 8 Jun 2011 09:09:07 +0100 From: Stefan Hajnoczi Message-ID: <20110608080907.GA26703@stefanha-thinkpad.localdomain> References: <4DCFB3EF.3060801@web.de> <4DEE49DE.2050302@siemens.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4DEE49DE.2050302@siemens.com> Subject: Re: [Qemu-devel] [PATCH 2/2] ioapic: Implement polarity List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: qemu-trivial , Jan Kiszka , qemu-devel On Tue, Jun 07, 2011 at 05:55:10PM +0200, Jan Kiszka wrote: > On 2011-05-15 13:07, Jan Kiszka wrote: > > From: Jan Kiszka > > > > If the polarity bit is set in a redirection table entry, the input level > > simply has to inverted as it is low active in this case. > > Ping for this and > http://thread.gmane.org/gmane.comp.emulators.qemu/102459. Maybe even > trivial, so CC'ing. Looks simple but I don't know x86 interrupt controller details, let's see if Anthony can pick this up. Stefan