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From: Gleb Natapov <gleb@redhat.com>
To: Markus Armbruster <armbru@redhat.com>
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"Anthony Liguori" <aliguori@us.ibm.com>,
	"Juha Riihimäki" <juha.riihimaki@nokia.com>,
	"patches@linaro.org" <patches@linaro.org>,
	"Jan Kiszka" <jan.kiszka@siemens.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
	"Paul Brook" <paul@codesourcery.com>
Subject: Re: [Qemu-devel] [PATCH RFC 0/3] basic support for composing sysbus devices
Date: Mon, 13 Jun 2011 12:57:20 +0300	[thread overview]
Message-ID: <20110613095720.GL491@redhat.com> (raw)
In-Reply-To: <m3hb7xwx4z.fsf@blackfin.pond.sub.org>

On Fri, Jun 10, 2011 at 04:59:08PM +0200, Markus Armbruster wrote:
> Anthony Liguori <aliguori@us.ibm.com> writes:
> 
> > On 06/10/2011 03:13 AM, Markus Armbruster wrote:
> >> Jan Kiszka<jan.kiszka@siemens.com>  writes:
> >>> Resource management, e.g. IRQs. That will be useful for other types of
> >>> buses as well.
> >>
> >> A device should be able to say "I need to be connected to an IRQ line".
> >> Feels generic to me.
> >
> > More specifically, a device has input IRQs.  A device has no idea what
> > number the IRQ is tied to.
> >
> > Devices may also have output IRQs.  At the qdev layer, we should be
> > able to connect an arbitrary output IRQ to an arbitrary input IRQ.
> >
> > So the crux of the problem is that:
> >
> >  -device isa-serial,id=serial,irq=3
> >
> > Is very wrong.  It ought to look something more like
> >
> >  -device piix3,id=piix3 -device isa-serial,id=serial,irq=piix3.irq[3]
> 
> As Jan pointed out, ISA is a counter-example: your "very wrong" claim is
> actually wrong there :)
> 
> An ISA device is always connected to all the ISA bus's interrupt lines.
> Device configuration determines how the device uses these lines.
> 
> The old (non-MSI) PCI interrupts are similar, I think.
> 

Each PCI card has 4 irq pins INTA/INTB/INTC/INTD (usually only INTA is
used). Chipset has PCI irq router with one or more inputs (PIIX3 has
4 PIRQ[A:D]#).  Wiring on the motherboard determines which irq pin is
connect to which PCI irq router input. Different slots usually connect
the same interrupt line to a different router input in order to spread
INTA of different cards between different inputs. PCI irq router is
configured to route each input pin to a different (or same) GSI. OS can
reconfigure irq router at will using AML methods if they are provided.

--
			Gleb.

  parent reply	other threads:[~2011-06-13  9:57 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2011-06-08 11:33 [Qemu-devel] [PATCH RFC 0/3] basic support for composing sysbus devices Peter Maydell
2011-06-08 11:33 ` [Qemu-devel] [PATCH RFC 1/3] sysbus: Add support for resizing and unmapping MMIOs Peter Maydell
2011-06-08 11:33 ` [Qemu-devel] [PATCH RFC 2/3] sysbus: Allow sysbus MMIO passthrough Peter Maydell
2011-06-08 11:33 ` [Qemu-devel] [PATCH RFC 3/3] sysbus: Allow passthrough of single IRQ Peter Maydell
2011-06-08 12:29 ` [Qemu-devel] [PATCH RFC 0/3] basic support for composing sysbus devices Jan Kiszka
2011-06-09 16:40   ` Markus Armbruster
2011-06-09 17:03     ` Jan Kiszka
2011-06-10  8:13       ` Markus Armbruster
2011-06-10 12:51         ` Anthony Liguori
2011-06-10 13:10           ` Peter Maydell
2011-06-10 13:43             ` Jan Kiszka
2011-06-10 13:50               ` Peter Maydell
2011-06-10 14:22                 ` Markus Armbruster
2011-06-10 14:45                   ` Anthony Liguori
2011-06-10 14:34                 ` Anthony Liguori
2011-06-10 14:12               ` Anthony Liguori
2011-06-10 14:18                 ` Jan Kiszka
2011-06-10 14:31                   ` Anthony Liguori
2011-06-10 14:07             ` Anthony Liguori
2011-06-10 14:59           ` Markus Armbruster
2011-06-10 15:43             ` Anthony Liguori
2011-06-12 17:12               ` Avi Kivity
2011-06-12 19:21                 ` Anthony Liguori
2011-06-13  8:05                   ` Avi Kivity
2011-06-13 17:53                     ` Anthony Liguori
2011-06-13 20:59                   ` Blue Swirl
2011-06-14 13:21                     ` Anthony Liguori
2011-06-15 18:56                       ` Blue Swirl
2011-06-15 20:00                         ` Anthony Liguori
2011-06-15 20:20                           ` Blue Swirl
2011-06-20 15:23                             ` Paul Brook
2011-06-20 21:32                               ` Blue Swirl
2011-06-21  8:16                                 ` Avi Kivity
2011-06-27  2:26                                 ` Paul Brook
2011-06-13  9:57             ` Gleb Natapov [this message]
2011-06-10 16:28           ` Andreas Färber

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