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Date: Thu, 21 Jul 2011 01:33:21 +0900
From: Isaku Yamahata <yamahata@valinux.co.jp>
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Subject: Re: [Qemu-devel] [PATCH] pci: Length-align config space accesses
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To: Jan Kiszka <jan.kiszka@siemens.com>
Cc: Avi Kivity <avi@redhat.com>, qemu-devel <qemu-devel@nongnu.org>, "Michael S. Tsirkin" <mst@redhat.com>

On Wed, Jul 20, 2011 at 06:18:43PM +0200, Jan Kiszka wrote:
> On 2011-07-20 18:17, Isaku Yamahata wrote:
> > On Wed, Jul 20, 2011 at 04:27:08PM +0200, Jan Kiszka wrote:
> >> On 2011-07-20 14:15, Jan Kiszka wrote:
> >>> On 2011-07-20 14:00, Isaku Yamahata wrote:
> >>>> Hi. This clean up looks good basically.
> >>>
> >>> Oops, forgot to cc you. Sorry.
> >>>
> >>>> But when conventional pci device is accessed via MMCONFIG area,
> >>>> addr &= addr_mask doesn't work as expected.
> >>>> The config area of [256, 4K) of conventional pci should have no effect.
> >>>
> >>> Mmh, I see. Looks like we need to split accesses at this boundary and
> >>> executed them separately.
> >>
> >> Nope, no such issue: we already automatically split up accesses that
> >> span the legacy/extended boundary. Just like so far, legacy config space
> >> handlers have to filter out requests that address regions >= 256.
> > 
> > For example, when accessing to offset 257 of conventional pci device,
> > the access is routed to offset 1 due to the masking.
> > Such overwrapping isn't correct.
> 
> No, it isn't routed like that. The mask used via mmio is 0xfff.

Ah sorry, you're right.
So pci_default_{read, write}_config() need to check it.
-- 
yamahata