From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:46772) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QjwOp-0004V7-3i for qemu-devel@nongnu.org; Thu, 21 Jul 2011 12:46:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QjwOn-0005JS-T4 for qemu-devel@nongnu.org; Thu, 21 Jul 2011 12:46:59 -0400 Received: from ch1ehsobe001.messaging.microsoft.com ([216.32.181.181]:27900 helo=ch1outboundpool.messaging.microsoft.com) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QjwOn-0005J2-QR for qemu-devel@nongnu.org; Thu, 21 Jul 2011 12:46:57 -0400 Date: Thu, 21 Jul 2011 11:46:46 -0500 From: Scott Wood Message-ID: <20110721114646.08f3f97c@schlenkerla.am.freescale.net> In-Reply-To: <1311211654-14326-4-git-send-email-agraf@suse.de> References: <1311211654-14326-1-git-send-email-agraf@suse.de> <1311211654-14326-4-git-send-email-agraf@suse.de> MIME-Version: 1.0 Content-Type: text/plain; charset="US-ASCII" Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 03/23] PPC: Add CPU definitions for up to 32 guest CPUs List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: QEMU-devel Developers On Thu, 21 Jul 2011 03:27:14 +0200 Alexander Graf wrote: > All guest CPUs need to be specified in the device trees. Since removing nodes > is easy with FDT, but adding nodes is not, we just put 32 CPU nodes into the > device tree and remove them later on init when not used. Adding nodes isn't that hard... I'm also hesitant to stick so many CPUs on something modeled after an e500v2-era mpc85xx. E.g. in the MPIC the upper bits of xIDR are used for EP/CIx. The newer MPIC used in p4080 and such move crit/mcheck routing into a separate register. There are similar constraints in guts (power management), and possibly elsewhere. -Scott