From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:45461) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QlzWP-0006h5-LV for qemu-devel@nongnu.org; Wed, 27 Jul 2011 04:31:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QlzWO-0005Wx-AB for qemu-devel@nongnu.org; Wed, 27 Jul 2011 04:31:17 -0400 Received: from mx1.redhat.com ([209.132.183.28]:7893) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QlzWO-0005Wn-05 for qemu-devel@nongnu.org; Wed, 27 Jul 2011 04:31:16 -0400 Date: Wed, 27 Jul 2011 11:31:20 +0300 From: "Michael S. Tsirkin" Message-ID: <20110727083120.GC15762@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Subject: [Qemu-devel] vt82686b query List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: aurelien@aurel32.net, zltjiangshi@gmail.com, qemu-devel@nongnu.org Does one of you maintain the vt82686b emulation? I was doing an overview of pci devices and have some questions on it: vt82c686b_write_config - this seems to assume that config writes are done using single byte accesses. E.g. a two byte access at 0x84 will modify the register at offset 0x85 but isn't handled by the emulation. Is this intentional? PCI_STATUS and PCI_CAPABILITY_LIST are initialized in the reset callback. These are readonly so should go into init - there's no guarantee reset is invoked in time to set these correctly, is there? PCI_CAPABILITY_LIST is a single byte register. Better set it using pci_set_byte or simple memory access? Higer bytes in that word are reserved so zeroing them out is harmless, but still ... via_pm_info has a config write method that simply invokes the pci_default_write_config directly - makes sense to remove it and save some lines of code? Will you be able to review/test patches addressing the above? Thanks! -- MST