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Date: Fri, 29 Jul 2011 08:03:01 +0300
From: "Michael S. Tsirkin" <mst@redhat.com>
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Subject: Re: [Qemu-devel] [PATCH v2] pci: Common overflow prevention
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To: Isaku Yamahata <yamahata@valinux.co.jp>
Cc: Jan Kiszka <jan.kiszka@siemens.com>, qemu-devel <qemu-devel@nongnu.org>

On Fri, Jul 29, 2011 at 10:01:43AM +0900, Isaku Yamahata wrote:
> On Thu, Jul 28, 2011 at 11:40:21AM +0300, Michael S. Tsirkin wrote:
> > I don't see a problem with this, but could you please clarify when does
> > this happen? I think this is only possible for a pci device
> > behind an express root. If so, this belongs in pcie_host.c
> > 
> > I'd also like this info to be recorded in the commit log.
> 
> >From 1dd598fd35d4e988dc51487829ed66208ca89021 Mon Sep 17 00:00:00 2001
> Message-Id: <1dd598fd35d4e988dc51487829ed66208ca89021.1311901239.git.yamahata@valinux.co.jp>
> From: Isaku Yamahata <yamahata@valinux.co.jp>
> Date: Fri, 29 Jul 2011 09:52:45 +0900
> Subject: [PATCH] pcie_host: limit check of pcie_mmcfg_data_write/read
> 
> This patch adds the check where the offset in the configuration space
> is in its configuration size.
> 
> MMCFG area allows access of pcie configuration space to be in
> offset [0, 4K).
> At the same time, conventional pci devices whose configuration space size
> is 256 bytes can be behind pcie-to-pci bridge.
> The access whose offset is [256, 4K) should have no effect
> on the conventional pci device
> Add the limit check and ignore such accesses.
> 
> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>

I tweaked the commit log and applied this.
Thanks!