Re: [Qemu-devel] [PATCH 2/6] Implement POWER7's CFAR in TCG

[David Gibson <david@gibson.dropbear.id.au>]

On Wed, Aug 10, 2011 at 05:10:11PM +0200, Alexander Graf wrote:
> On 08/04/2011 09:02 AM, David Gibson wrote:
[snip]
> >@@ -187,12 +195,13 @@ typedef struct DisasContext {
> >      int le_mode;
> >  #if defined(TARGET_PPC64)
> >      int sf_mode;
> >+    int has_cfar;
> >  #endif
> >      int fpu_enabled;
> >      int altivec_enabled;
> >      int spe_enabled;
> >      ppc_spr_t *spr_cb; /* Needed to check rights for mfspr/mtspr */
> >-    int singlestep_enabled;
> >+    int singlestep_enabled;
> 
> Fairly sure this isn't intended :)

Oops, fixed.  I think I'll blame Ben for that one :).  And the others.

[snip]
> >@@ -6508,6 +6519,14 @@ static void init_proc_POWER7 (CPUPPCState *env)
> >                   &spr_read_purr, SPR_NOACCESS,
> >                   &spr_read_purr, SPR_NOACCESS,
> >                   0x00000000);
> >+    spr_register(env, SPR_CFAR, "SPR_CFAR",
> >+                 SPR_NOACCESS, SPR_NOACCESS,
> >+&spr_read_cfar,&spr_write_cfar,
> >+                 0x00000000);
> >+    spr_register(env, SPR_DSCR, "SPR_DSCR",
> >+                 SPR_NOACCESS, SPR_NOACCESS,
> >+&spr_read_generic,&spr_write_generic,
> >+                 0x00000000);
> 
> Are you sure this is only present on POWER7 and no machines before
> that? Does 970 have CFAR?

Looking at the feature bits in the kernel, it appears that it's in
POWER6 and POWER7, but not in 970, POWER4 or POWER5.  Since we don't
have a model for POWER5 or POWER6, I believe the qemu logic here is
correct.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson