From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:37962) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QwJFp-0005vp-VC for qemu-devel@nongnu.org; Wed, 24 Aug 2011 15:36:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QwJFp-00021P-4f for qemu-devel@nongnu.org; Wed, 24 Aug 2011 15:36:49 -0400 Received: from mail-gw0-f45.google.com ([74.125.83.45]:38460) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QwJFo-00021J-Tl for qemu-devel@nongnu.org; Wed, 24 Aug 2011 15:36:49 -0400 Received: by gwb19 with SMTP id 19so1287191gwb.4 for ; Wed, 24 Aug 2011 12:36:47 -0700 (PDT) From: "Adnan Khaleel" Message-ID: <20110824193643.824b4f7b@shadowfax.no-ip.com> Date: Wed, 24 Aug 2011 14:36:43 -0500 MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="-----------d43d1f6c1147269d22aeb1dc5658cfcf" Subject: [Qemu-devel] When will the Q35 chipset be merged into Qemu mainstream Reply-To: adnan@khaleel.us List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: yamahata@valinux.co.jp This is a multi-part message in MIME format. -------------d43d1f6c1147269d22aeb1dc5658cfcf Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable PCI express support has been made available for quite sometime now with = patches from Isaku Yamahata for the Q35 chipset for Qemu 0.12 and then f= or Qemu 0.14. However, Qemu 0.15 has been released but support for the Q= 35 chipset is still not officially included. At what point will Qemu merge the Q35 chipset code for PCIexpress=3F AK -------------d43d1f6c1147269d22aeb1dc5658cfcf Content-Type: text/html; charset="us-ascii" Content-Transfer-Encoding: quoted-printable PCI express support has been made available for quite sometime now with = patches from Isaku Yamahata for the Q35 chipset for Qemu 0.12 and then f= or Qemu 0.14. However, Qemu 0.15 has been released but support for the Q= 35 chipset is still not officially included.

At what point will Q= emu merge the Q35 chipset code for PCIexpress=3F

AK
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