From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:43547) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QzgaV-00059K-Sp for qemu-devel@nongnu.org; Fri, 02 Sep 2011 23:08:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QzgaT-00088t-SJ for qemu-devel@nongnu.org; Fri, 02 Sep 2011 23:08:07 -0400 Received: from mail-fx0-f45.google.com ([209.85.161.45]:48206) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QzgaT-00087N-E6 for qemu-devel@nongnu.org; Fri, 02 Sep 2011 23:08:05 -0400 Received: by fxbb27 with SMTP id b27so2353777fxb.4 for ; Fri, 02 Sep 2011 20:08:04 -0700 (PDT) Sender: Eduard - Gabriel Munteanu Date: Sat, 3 Sep 2011 06:04:26 +0300 From: Eduard - Gabriel Munteanu Message-ID: <20110903030425.GA6087@localhost> References: <1314853263-2086-1-git-send-email-david@gibson.dropbear.id.au> <1314853263-2086-2-git-send-email-david@gibson.dropbear.id.au> <4E5FAADF.1040704@us.ibm.com> <4E5FACD6.9000603@redhat.com> <4E5FAD5C.4090208@codemonkey.ws> <4E6095C5.7050500@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <4E6095C5.7050500@redhat.com> Subject: Re: [Qemu-devel] [PATCH 01/10] Add stub functions for PCI device models to do PCI DMA List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: Anthony Liguori , joerg.roedel@amd.com, agraf@suse.de, qemu-devel@nongnu.org, rth@twiddle.net, David Gibson On Fri, Sep 02, 2011 at 11:37:25AM +0300, Avi Kivity wrote: > On 09/01/2011 07:05 PM, Anthony Liguori wrote: > > > > The challenge is what you do about something like ne2k where the core > > chipset can either be a PCI device or an ISA device. You would have > > to implement a wrapper around pci_dma_rw() in order to turn it into > > cpu_physical_memory_rw when doing ISA. > > btw, ISA DMA is very different, no? You program a dma controller to > copy memory from the device to RAM (or vice versa); the device never > initiates a transaction IIRC. It seems to me ISA devices should use memory I/O primitives exposed by the ISA bus code. Or maybe the DMA controllers involved should be doing that. As for either-PCI/ISA devices, they can handle dispatching DMA through the right interface themselves. Anyway, I'm not sure why we're worrying about this now. Do we even have IOMMUs for such use cases? Eduard