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Date: Fri, 9 Sep 2011 09:56:35 -0300
From: Marcelo Tosatti <mtosatti@redhat.com>
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Subject: Re: [Qemu-devel] [PATCH] KVM: emulate lapic tsc deadline timer for
	hvm
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To: "Liu, Jinsong" <jinsong.liu@intel.com>
Cc: Avi Kivity <avi@redhat.com>, "kvm@vger.kernel.org" <kvm@vger.kernel.org>, "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>

On Fri, Sep 09, 2011 at 01:12:51AM +0800, Liu, Jinsong wrote:
> >>> --- a/arch/x86/include/asm/msr-index.h
> >>> +++ b/arch/x86/include/asm/msr-index.h
> >>> @@ -229,6 +229,8 @@
> >>>  #define MSR_IA32_APICBASE_ENABLE	(1<<11)
> >>>  #define MSR_IA32_APICBASE_BASE		(0xfffff<<12)
> >>> 
> >>> +#define MSR_IA32_TSCDEADLINE		0x000006e0
> >>> +
> >>>  #define MSR_IA32_UCODE_WRITE		0x00000079
> >>>  #define MSR_IA32_UCODE_REV		0x0000008b
> >> 
> >> Need to add to msrs_to_save so live migration works.
> > 
> > MSR must be explicitly listed in qemu, also.
> > 
> 
> Marcelo, seems MSR don't need explicitly list in qemu?
> KVM side adding MSR_IA32_TSCDEADLINE to msrs_to_save is enough. Qemu will get it through KVM_GET_MSR_INDEX_LIST.
> Do I miss something?

Notice in target-i386/kvm.c the KVM_GET_MSR_INDEX_LIST list is only used
for MSR_STAR/MSR_HSAVE_PA presence detection.

Do you do need to explicitly add MSR_IA32_TSCDEADLINE to
kvm_get_msrs/kvm_put_msrs routines.