From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:37141) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R78on-0006gD-SJ for qemu-devel@nongnu.org; Fri, 23 Sep 2011 12:41:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1R78om-0001d9-8F for qemu-devel@nongnu.org; Fri, 23 Sep 2011 12:41:41 -0400 Received: from gw.ac.upc.edu ([147.83.30.3]:44268) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1R78ol-0001d3-R2 for qemu-devel@nongnu.org; Fri, 23 Sep 2011 12:41:40 -0400 From: =?utf-8?b?TGx1w61z?= Vilanova Date: Fri, 23 Sep 2011 18:39:18 +0200 Message-ID: <20110923163918.7646.96554.stgit@ginnungagap.bsc.es> In-Reply-To: <20110923163908.7646.87389.stgit@ginnungagap.bsc.es> References: <20110923163908.7646.87389.stgit@ginnungagap.bsc.es> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH v3 3/3] trace: Add "vcpu_reset" event List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Jan Kiszka , Stefan Hajnoczi Signals the reset of the state a vCPU (CPUState structure). Signed-off-by: Llu=C3=ADs Vilanova --- target-arm/helper.c | 3 +++ target-cris/translate.c | 3 +++ target-i386/helper.c | 3 +++ target-lm32/helper.c | 3 +++ target-m68k/helper.c | 3 +++ target-microblaze/translate.c | 3 +++ target-mips/translate.c | 3 +++ target-ppc/helper.c | 3 +++ target-s390x/helper.c | 3 +++ target-sh4/translate.c | 3 +++ target-sparc/helper.c | 3 +++ trace-events | 2 ++ 12 files changed, 35 insertions(+), 0 deletions(-) diff --git a/target-arm/helper.c b/target-arm/helper.c index d3a3ba2..c7f80b1 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -10,6 +10,7 @@ #if !defined(CONFIG_USER_ONLY) #include "hw/loader.h" #endif +#include "trace.h" =20 static uint32_t cortexa9_cp15_c0_c1[8] =3D { 0x1031, 0x11, 0x000, 0, 0x00100103, 0x20000000, 0x01230000, 0x00002111= }; @@ -321,6 +322,8 @@ void cpu_reset(CPUARMState *env) set_float_detect_tininess(float_tininess_before_rounding, &env->vfp.standard_fp_status); tlb_flush(env, 1); + + trace_vcpu_reset(env); } =20 static int vfp_gdb_get_reg(CPUState *env, uint8_t *buf, int reg) diff --git a/target-cris/translate.c b/target-cris/translate.c index 70abf8a..a871e7f 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -36,6 +36,7 @@ #include "mmu.h" #include "crisv32-decode.h" #include "qemu-common.h" +#include "trace.h" =20 #define GEN_HELPER 1 #include "helper.h" @@ -3601,6 +3602,8 @@ void cpu_reset (CPUCRISState *env) cris_mmu_init(env); env->pregs[PR_CCS] =3D 0; #endif + + trace_vcpu_reset(env); } =20 void restore_state_to_opc(CPUState *env, TranslationBlock *tb, int pc_po= s) diff --git a/target-i386/helper.c b/target-i386/helper.c index 5df40d4..d8a92e1 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -29,6 +29,7 @@ #include "sysemu.h" #include "monitor.h" #endif +#include "trace.h" =20 //#define DEBUG_MMU =20 @@ -104,6 +105,8 @@ void cpu_reset(CPUX86State *env) env->dr[7] =3D DR7_FIXED_1; cpu_breakpoint_remove_all(env, BP_CPU); cpu_watchpoint_remove_all(env, BP_CPU); + + trace_vcpu_reset(env); } =20 void cpu_x86_close(CPUX86State *env) diff --git a/target-lm32/helper.c b/target-lm32/helper.c index 014fd8d..6104bb8 100644 --- a/target-lm32/helper.c +++ b/target-lm32/helper.c @@ -24,6 +24,7 @@ #include "config.h" #include "cpu.h" #include "host-utils.h" +#include "trace.h" =20 int cpu_lm32_handle_mmu_fault(CPUState *env, target_ulong address, int r= w, int mmu_idx) @@ -250,5 +251,7 @@ void cpu_reset(CPUState *env) =20 /* reset cpu state */ memset(env, 0, offsetof(CPULM32State, breakpoints)); + + trace_vcpu_reset(env); } =20 diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 123e1d9..3a89f29 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -25,6 +25,7 @@ #include "cpu.h" #include "qemu-common.h" #include "gdbstub.h" +#include "trace.h" =20 #include "helper.h" =20 @@ -165,6 +166,8 @@ void cpu_reset(CPUM68KState *env) /* TODO: We should set PC from the interrupt vector. */ env->pc =3D 0; tlb_flush(env, 1); + + trace_vcpu_reset(env); } =20 CPUM68KState *cpu_m68k_init(const char *cpu_model) diff --git a/target-microblaze/translate.c b/target-microblaze/translate.= c index 366fd3e..f976311 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -30,6 +30,7 @@ #include "helper.h" #include "microblaze-decode.h" #include "qemu-common.h" +#include "trace.h" =20 #define GEN_HELPER 1 #include "helper.h" @@ -1943,6 +1944,8 @@ void cpu_reset (CPUState *env) env->mmu.c_mmu_tlb_access =3D 3; env->mmu.c_mmu_zones =3D 16; #endif + + trace_vcpu_reset(env); } =20 void restore_state_to_opc(CPUState *env, TranslationBlock *tb, int pc_po= s) diff --git a/target-mips/translate.c b/target-mips/translate.c index d5b1c76..73c4c5e 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -30,6 +30,7 @@ #include "disas.h" #include "tcg-op.h" #include "qemu-common.h" +#include "trace.h" =20 #include "helper.h" #define GEN_HELPER 1 @@ -12846,6 +12847,8 @@ void cpu_reset (CPUMIPSState *env) } #endif env->exception_index =3D EXCP_NONE; + + trace_vcpu_reset(env); } =20 void restore_state_to_opc(CPUState *env, TranslationBlock *tb, int pc_po= s) diff --git a/target-ppc/helper.c b/target-ppc/helper.c index 96ea464..81bc200 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -26,6 +26,7 @@ #include "helper_regs.h" #include "qemu-common.h" #include "kvm.h" +#include "trace.h" =20 //#define DEBUG_MMU //#define DEBUG_BATS @@ -3084,6 +3085,8 @@ void cpu_reset(CPUPPCState *env) env->error_code =3D 0; /* Flush all TLBs */ tlb_flush(env, 1); + + trace_vcpu_reset(env); } =20 CPUPPCState *cpu_ppc_init (const char *cpu_model) diff --git a/target-s390x/helper.c b/target-s390x/helper.c index 96dd867..9cfa9ef 100644 --- a/target-s390x/helper.c +++ b/target-s390x/helper.c @@ -26,6 +26,7 @@ #include "gdbstub.h" #include "qemu-common.h" #include "qemu-timer.h" +#include "trace.h" =20 //#define DEBUG_S390 //#define DEBUG_S390_PTE @@ -131,6 +132,8 @@ void cpu_reset(CPUS390XState *env) memset(env, 0, offsetof(CPUS390XState, breakpoints)); /* FIXME: reset vector? */ tlb_flush(env, 1); + + trace_vcpu_reset(env); } =20 #ifndef CONFIG_USER_ONLY diff --git a/target-sh4/translate.c b/target-sh4/translate.c index bad3577..2487451 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -30,6 +30,7 @@ #include "disas.h" #include "tcg-op.h" #include "qemu-common.h" +#include "trace.h" =20 #include "helper.h" #define GEN_HELPER 1 @@ -205,6 +206,8 @@ void cpu_reset(CPUSH4State * env) set_flush_to_zero(1, &env->fp_status); #endif set_default_nan_mode(1, &env->fp_status); + + trace_vcpu_reset(env); } =20 typedef struct { diff --git a/target-sparc/helper.c b/target-sparc/helper.c index c80531a..98dc464 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -24,6 +24,7 @@ =20 #include "cpu.h" #include "qemu-common.h" +#include "trace.h" =20 //#define DEBUG_MMU //#define DEBUG_FEATURES @@ -1166,6 +1167,8 @@ void cpu_reset(CPUSPARCState *env) env->npc =3D env->pc + 4; #endif env->cache_control =3D 0; + + trace_vcpu_reset(env); } =20 static int cpu_sparc_register(CPUSPARCState *env, const char *cpu_model) diff --git a/trace-events b/trace-events index 9b87f90..d20602f 100644 --- a/trace-events +++ b/trace-events @@ -509,3 +509,5 @@ escc_sunmouse_event(int dx, int dy, int buttons_state= ) "dx=3D%d dy=3D%d buttons=3D%01x =20 # Create a new vCPU (CPUState structure) vcpu_init(void *vcpu) "%p" +# Reset the state of a vCPU +vcpu_reset(void *vcpu) "%p"