From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:57095) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RjvD7-0004am-Sv for qemu-devel@nongnu.org; Sun, 08 Jan 2012 11:03:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RjvD6-0007bZ-6Y for qemu-devel@nongnu.org; Sun, 08 Jan 2012 11:03:05 -0500 Received: from mail-ee0-f45.google.com ([74.125.83.45]:32991) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RjvD5-0007bG-Vn for qemu-devel@nongnu.org; Sun, 08 Jan 2012 11:03:04 -0500 Received: by eekb45 with SMTP id b45so2070697eek.4 for ; Sun, 08 Jan 2012 08:03:03 -0800 (PST) From: Marek Vasut Date: Sun, 8 Jan 2012 17:02:59 +0100 References: <1325967077-10130-1-git-send-email-marek.vasut@gmail.com> <201201072156.29776.marek.vasut@gmail.com> In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Message-Id: <201201081702.59630.marek.vasut@gmail.com> Subject: Re: [Qemu-devel] [PATCH] PL011: Fix ID reporting List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Peter Maydell Cc: qemu-devel@nongnu.org > On 7 January 2012 20:56, Marek Vasut wrote: > >> On 7 January 2012 20:11, Marek Vasut wrote: > >> > The AMBA IDs are supposed to be at the end of 0x2000 block, which the > >> > PL011 UART allocates. Current QEMU implementation puts those IDs at > >> > 0x1000 offset, which is wrong. The QEMU implementation also allocates > >> > only 0x1000 instead of 0x2000 of space. > >> > >> Why do you think this change is correct? The PL011 TRM > >> http://infocenter.arm.com/help/topic/com.arm.doc.ddi0183g/I18381.html > >> says the ID registers are at 0xFE0..0xFFC. > >> and for instance on the PBX-A9 devboard: > >> http://infocenter.arm.com/help/topic/com.arm.doc.dui0440b/Bbajihec.html > >> the UARTs are at 0x10009000, 0x1000A000, 0x1000B000, 0x1000C000, so > >> they clearly can't be 0x2000 in size. > > > > Then we have a problem, because eg. on freescale mx28 they are 0x2000 > > big. The only conclusion I can draw from this is that the size of the > > segment that can be assigned to PL011 is variable and the ID-octet is > > always at the end. > > Can you point me to some documentation? I looked at > http://cache.freescale.com/files/dsp/doc/ref_manual/MCIMX28RM.pdf?fsrch=1&s > r=7 (i.MX28 Applications Processor Reference Manual) and although it has a > number of UARTs none of them looked obviously like PL011s. That's it, look at DUART section and Memory map section. M > > -- PMM