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From: 陳韋任 <chenwj@iis.sinica.edu.tw>
To: Xin Tong <xerox.time.tech@gmail.com>
Cc: qemu-devel <qemu-devel@nongnu.org>, 陳韋任 <chenwj@iis.sinica.edu.tw>
Subject: Re: [Qemu-devel] nested page table translation for non-x86 operating system
Date: Tue, 31 Jan 2012 15:28:52 +0800	[thread overview]
Message-ID: <20120131072852.GA32162@cs.nctu.edu.tw> (raw)
In-Reply-To: <CALKntY3vMoQ=9reiC2_AzbLyk=mMoGv8CV2yZiOs2rznhBNpMA@mail.gmail.com>

On Fri, Jan 20, 2012 at 08:54:12AM -0500, Xin Tong wrote:
> On Fri, Jan 20, 2012 at 3:23 AM, 陳韋任 <chenwj@iis.sinica.edu.tw> wrote:
> >> 1.  The control of gCR3 and hCR3 needs kernel access. While they can
> >> be set with a device module as what is done in kvm. Trapping into the
> >> kernel every time gCR3 is reseted might be too expensive.
> >
> >  Why the control of gCR3 needs kernel access? Isn't gCR3 just a field of the
> > CPUX86State? QEMU should have the control of it. Or you mean the trapping thing?
> 
> I do not think gCR3 is a field in the CPUx86State. I think inorder to
> change the guest CR3, we need to trap into the kernel as kvm does.

  If your scenario is pure QEMU (without kvm), I think gCR3 is a field in the
CPUx86State. See below,

typedef struct CPUX86State {

    ...

    target_ulong cr[5]; /* NOTE: cr1 is unused */

    ...
};

Or I misunderstand what you're trying to do?

Regards,
chenwj

-- 
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj

  reply	other threads:[~2012-01-31  7:29 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-01-20  5:12 [Qemu-devel] nested page table translation for non-x86 operating system Xin Tong
2012-01-20  8:23 ` 陳韋任
2012-01-20 13:54   ` Xin Tong
2012-01-31  7:28     ` 陳韋任 [this message]
2012-06-22  7:28 ` 陳韋任 (Wei-Ren Chen)
2012-06-22  9:48   ` Xin Tong

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