From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:43785) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RtgmF-0002HU-DP for qemu-devel@nongnu.org; Sat, 04 Feb 2012 09:39:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RtgmD-00069W-4V for qemu-devel@nongnu.org; Sat, 04 Feb 2012 09:39:43 -0500 Date: Sat, 4 Feb 2012 22:39:24 +0800 From: =?utf-8?B?6Zmz6Z+L5Lu7?= Message-ID: <20120204143924.GA554@cs.nctu.edu.tw> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH] cpu-exec.c: Correct comment about this file and indentation cleanup List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-trivial@nongnu.org Each target use #define marco (in target-xxx/cpu.h) to rename cpu_exec (cpu-exec.c) to cpu_xxx_exec, then defines its own cpu_loop which calls cpu_xxx_exec. So basically, cpu-exec.c is not i386 (only) emulator main execution loop. This patch correctes the comment of this file and does indentation cleanup. Signed-off-by: Chen Wei-Ren (=E9=99=B3=E9=9F=8B=E4=BB=BB) --- cpu-exec.c | 10 +++++----- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/cpu-exec.c b/cpu-exec.c index a9fa608..f7f19f5 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -1,5 +1,5 @@ /* - * i386 emulator main execution loop + * emulator main execution loop * * Copyright (c) 2003-2005 Fabrice Bellard * @@ -304,7 +304,7 @@ int cpu_exec(CPUState *env) env->hflags2 |=3D HF2_NMI_MASK; do_interrupt_x86_hardirq(env, EXCP02_NMI, 1)= ; next_tb =3D 0; - } else if (interrupt_request & CPU_INTERRUPT_MCE) { + } else if (interrupt_request & CPU_INTERRUPT_MCE) { env->interrupt_request &=3D ~CPU_INTERRUPT_M= CE; do_interrupt_x86_hardirq(env, EXCP12_MCHK, 0= ); next_tb =3D 0; @@ -390,7 +390,7 @@ int cpu_exec(CPUState *env) next_tb =3D 0; } } - } + } #elif defined(TARGET_ARM) if (interrupt_request & CPU_INTERRUPT_FIQ && !(env->uncached_cpsr & CPSR_F)) { @@ -429,7 +429,7 @@ int cpu_exec(CPUState *env) { int idx =3D -1; /* ??? This hard-codes the OSF/1 interrupt level= s. */ - switch (env->pal_mode ? 7 : env->ps & PS_INT_MASK) { + switch (env->pal_mode ? 7 : env->ps & PS_INT_MASK)= { case 0 ... 3: if (interrupt_request & CPU_INTERRUPT_HARD) = { idx =3D EXCP_DEV_INTERRUPT; @@ -562,7 +562,7 @@ int cpu_exec(CPUState *env) barrier(); if (likely(!env->exit_request)) { tc_ptr =3D tb->tc_ptr; - /* execute the generated code */ + /* execute the generated code */ next_tb =3D tcg_qemu_tb_exec(env, tc_ptr); if ((next_tb & 3) =3D=3D 2) { /* Instruction counter expired. */ --=20 1.7.3.5