From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:38809) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RvzhS-000367-Ju for qemu-devel@nongnu.org; Fri, 10 Feb 2012 18:16:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RvzhQ-0001Vm-WE for qemu-devel@nongnu.org; Fri, 10 Feb 2012 18:16:18 -0500 Received: from relay1.mentorg.com ([192.94.38.131]:49194) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RvzhQ-0001VV-Ng for qemu-devel@nongnu.org; Fri, 10 Feb 2012 18:16:16 -0500 From: Paul Brook Date: Fri, 10 Feb 2012 23:16:09 +0000 References: <1328873011-25793-1-git-send-email-paul@codesourcery.com> <4F359E73.4000703@suse.de> In-Reply-To: <4F359E73.4000703@suse.de> MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-15" Content-Transfer-Encoding: 7bit Message-Id: <201202102316.09638.paul@codesourcery.com> Subject: Re: [Qemu-devel] [PATCH] Merge mips64 and mipsn32 List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Riku Voipio , Andreas =?iso-8859-15?q?F=E4rber?= , Aurelien Jarno , Richard Henderson > > Make MIPS N32 be a variant of mips64, rather than a new architecture in > > its own right. This matches how sparc/ppc work, and makes TARGET_MIPS64 > > the right thing to check for a 64-bit mips core. > > > > As side-effect of this is that linux-user/mipsn32 gets merged into > > linux-user/mips64. I consider this to be a feature as anything > > differences other than the syscall numbers are probably bugs. >... > Note: Richard Henderson and me had been looking into code sharing among > the MIPS ABIs for signal handling in response to a half-done Octeon > mips64 patchset. > > There's an unfinished RFC of mine from December or so, feel free to pick > that up or to come up with a better idea! Yeah, I found those and have a couple of other patches I need to reconcile and push out. I haven't looked at the signal handling bits. Paul