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From: Paul Brook <paul@codesourcery.com>
To: "Peter A. G. Crosthwaite" <peter.crosthwaite@petalogix.com>
Cc: peter.maydell@linaro.org, monstr@monstr.eu,
	edgar.iglesias@petalogix.com, qemu-devel@nongnu.org,
	John Linn <john.linn@xilinx.com>,
	duyl@xilinx.com, linnj@xilinx.com, afaerber@suse.de,
	john.williams@petalogix.com
Subject: Re: [Qemu-devel] [PATCH v3 2/4] cadence_ttc: initial version of device model
Date: Sat, 11 Feb 2012 14:18:49 +0000	[thread overview]
Message-ID: <201202111418.49949.paul@codesourcery.com> (raw)
In-Reply-To: <aa44a586a5d88ef2b3c9d66ff7062598d60bdf70.1328944806.git.peter.crosthwaite@petalogix.com>

> +static void cadence_timer_sync(CadenceTimerState *s)
> +{
>...
> +    r = (int64_t)cadence_timer_get_steps(s, s->cpu_time - old_time);
> +    x = (int64_t)s->reg_value + ((s->reg_count & COUNTER_CTRL_DEC) ? -r :
> r); +
> +    for (i = 0; i < 3; ++i) {
> +        if (is_between((int64_t)s->reg_match[i] << 16, s->reg_value, x)) {
> +            s->reg_intr |= (2 << i);
> +        }
> +    }

By my reading this will miss events if they happen after the timer wraps.
e.g. for a count-up timer with reg_match==1 and the tick callback happens to 
get delayed by 4 cycles, the timer may wrap straight to reg_value = 3.

Paul

  reply	other threads:[~2012-02-11 14:18 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-02-11  7:35 [Qemu-devel] [PATCH v3 0/4] Zynq-7000 EPP platform model Peter A. G. Crosthwaite
2012-02-11  7:35 ` [Qemu-devel] [PATCH v3 1/4] cadence_uart: initial version of device model Peter A. G. Crosthwaite
2012-02-11  7:35 ` [Qemu-devel] [PATCH v3 2/4] cadence_ttc: " Peter A. G. Crosthwaite
2012-02-11 14:18   ` Paul Brook [this message]
2012-02-12  0:00     ` Peter Crosthwaite
2012-02-11  7:35 ` [Qemu-devel] [PATCH v3 3/4] cadence_gem: " Peter A. G. Crosthwaite
2012-02-11  7:35 ` [Qemu-devel] [PATCH v3 4/4] xilinx_zynq: machine model initial version Peter A. G. Crosthwaite

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