From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([140.186.70.92]:36601) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RwDn1-0000l3-3a for qemu-devel@nongnu.org; Sat, 11 Feb 2012 09:18:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RwDn0-0007Yw-47 for qemu-devel@nongnu.org; Sat, 11 Feb 2012 09:18:59 -0500 Received: from relay1.mentorg.com ([192.94.38.131]:35937) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RwDmz-0007Yp-SX for qemu-devel@nongnu.org; Sat, 11 Feb 2012 09:18:58 -0500 From: Paul Brook Date: Sat, 11 Feb 2012 14:18:49 +0000 References: In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-6" Content-Transfer-Encoding: 7bit Message-Id: <201202111418.49949.paul@codesourcery.com> Subject: Re: [Qemu-devel] [PATCH v3 2/4] cadence_ttc: initial version of device model List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Peter A. G. Crosthwaite" Cc: peter.maydell@linaro.org, monstr@monstr.eu, edgar.iglesias@petalogix.com, qemu-devel@nongnu.org, John Linn , duyl@xilinx.com, linnj@xilinx.com, afaerber@suse.de, john.williams@petalogix.com > +static void cadence_timer_sync(CadenceTimerState *s) > +{ >... > + r = (int64_t)cadence_timer_get_steps(s, s->cpu_time - old_time); > + x = (int64_t)s->reg_value + ((s->reg_count & COUNTER_CTRL_DEC) ? -r : > r); + > + for (i = 0; i < 3; ++i) { > + if (is_between((int64_t)s->reg_match[i] << 16, s->reg_value, x)) { > + s->reg_intr |= (2 << i); > + } > + } By my reading this will miss events if they happen after the timer wraps. e.g. for a count-up timer with reg_match==1 and the tick callback happens to get delayed by 4 cycles, the timer may wrap straight to reg_value = 3. Paul