From: "Michael S. Tsirkin" <mst@redhat.com>
To: Gerd Hoffmann <kraxel@redhat.com>
Cc: Kevin Wolf <kwolf@redhat.com>,
Isaku Yamahata <yamahata@valinux.co.jp>,
qemu-devel@nongnu.org, kvm@vger.kernel.org,
Avi Kivity <avi@redhat.com>
Subject: Re: [Qemu-devel] [PATCHv2-RFC 2/2] pci: add standard bridge device
Date: Tue, 21 Feb 2012 00:40:02 +0200 [thread overview]
Message-ID: <20120220224001.GA22036@redhat.com> (raw)
In-Reply-To: <4F3E5736.5060606@redhat.com>
On Fri, Feb 17, 2012 at 02:33:42PM +0100, Gerd Hoffmann wrote:
> On 02/13/12 10:16, Michael S. Tsirkin wrote:
> > This adds support for a standard pci to pci bridge,
> > enabling support for more than 32 PCI devices in the system.
> > Device hotplug is supported by means of SHPC controller.
> > For guests with an SHPC driver, this allows robust hotplug
> > and even hotplug of nested bridges, up to 31 devices
> > per bridge.
>
> This seems to not support 64bit prefetchable memory windows, at least
> linux doesn't think it does, lspci looks like this:
>
> 00:10.0 PCI bridge: Red Hat, Inc. Device 0001 (prog-if 00 [Normal decode])
> Physical Slot: 16
> Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop-
> ParErr- Stepping- SERR- FastB2B- DisINTx-
> Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort-
> <TAbort- <MAbort- >SERR- <PERR- INTx-
> Latency: 0
> Region 0: Memory at f6126000 (32-bit, non-prefetchable) [size=256]
> Bus: primary=00, secondary=01, subordinate=01, sec-latency=0
> Memory behind bridge: f6000000-f60fffff
> Prefetchable memory behind bridge: f8000000-fbffffff
> Secondary status: 66MHz+ FastB2B+ ParErr- DEVSEL=fast >TAbort-
> <TAbort- <MAbort- <SERR- <PERR-
> BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B-
> PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn-
> Capabilities: [40] Hot-plug capable
> Kernel modules: shpchp
>
> Intentional?
>
> cheers,
> Gerd
I'll need to check. v3 I am sending out has this code unchanged.
What in the above tells you that 64 bit windows are not supported?
BAR0 is 32 bit non prefetcheable. As far as I can see linux driver
takes no precautions against access combining that can
happen with prefetcheable BARs, so non-prefetcheable
seems safer. I could make it 64 bit I guess, I just heard that
there is some known bug being worked around in
memory region code triggered somehow by 64 bit, and
waiting for the dust to settle.
--
MST
next prev parent reply other threads:[~2012-02-20 22:40 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-02-13 9:15 [Qemu-devel] [PATCHv2-RFC 0/2] RFC: standard pci bridge device Michael S. Tsirkin
2012-02-13 9:15 ` [Qemu-devel] [PATCHv2-RFC 1/2] shpc: standard hot plug controller Michael S. Tsirkin
2012-02-13 10:03 ` Isaku Yamahata
2012-02-13 11:49 ` Michael S. Tsirkin
2012-02-13 14:30 ` Isaku Yamahata
2012-02-13 14:49 ` Michael S. Tsirkin
2012-02-17 13:20 ` Gerd Hoffmann
2012-02-13 9:16 ` [Qemu-devel] [PATCHv2-RFC 2/2] pci: add standard bridge device Michael S. Tsirkin
2012-02-17 13:25 ` Gerd Hoffmann
2012-02-19 14:57 ` Michael S. Tsirkin
2012-02-19 23:44 ` Michael S. Tsirkin
2012-02-17 13:33 ` Gerd Hoffmann
2012-02-20 22:40 ` Michael S. Tsirkin [this message]
2012-02-21 8:02 ` Gerd Hoffmann
2012-02-13 9:33 ` [Qemu-devel] [PATCH RFC] seabios: add OSHP method stub Michael S. Tsirkin
2012-02-14 0:34 ` Kevin O'Connor
2012-02-14 0:43 ` Michael S. Tsirkin
2012-02-14 0:48 ` Kevin O'Connor
2012-02-14 1:09 ` Michael S. Tsirkin
2012-02-14 12:49 ` Paul Brook
2012-02-14 13:37 ` Michael S. Tsirkin
2012-02-14 13:47 ` Paul Brook
2012-02-14 14:11 ` Michael S. Tsirkin
2012-02-29 11:25 ` [Qemu-devel] [SeaBIOS] " Gerd Hoffmann
2012-02-13 9:38 ` [Qemu-devel] [PATCHv2-RFC 0/2] RFC: standard pci bridge device Wen Congyang
2012-02-13 9:56 ` Michael S. Tsirkin
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