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* [Qemu-devel] [Bug 942659] [NEW] ARM: CORTEX M, PRIMASK does not disable interrupts
@ 2012-02-28 14:49 Oleksiy Bondarenko
  2012-02-28 15:12 ` [Qemu-devel] [Bug 942659] " Peter Maydell
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Oleksiy Bondarenko @ 2012-02-28 14:49 UTC (permalink / raw)
  To: qemu-devel

Public bug reported:

qemu version 0.15.1
but the same code is in qemu 1.0

"CPSID I" does not disable interrupts for CORTEX M3


if (interrupt_request & CPU_INTERRUPT_HARD
                        && ((IS_M(env) && env->regs[15] < 0xfffffff0)
                            || !(env->uncached_cpsr & CPSR_I))) {
                        env->exception_index = EXCP_IRQ;
                        do_interrupt(env);
                        next_tb = 0;
                    }


do_interrupt() will be executed even if (env->uncached_cpsr & CPSR_I) == 1 , disable interrupt bit set.


then changed to: 

if (interrupt_request & CPU_INTERRUPT_HARD 
                        && !(env->uncached_cpsr & CPSR_I)
                        && (IS_M(env) ? env->regs[15] < 0xfffffff0: 1) ) {
                        env->exception_index = EXCP_IRQ;
                        do_interrupt(env);
                        next_tb = 0;
                    }

works

** Affects: qemu
     Importance: Undecided
         Status: New


** Tags: arm cortexm

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https://bugs.launchpad.net/bugs/942659

Title:
  ARM: CORTEX M, PRIMASK does not disable interrupts

Status in QEMU:
  New

Bug description:
  qemu version 0.15.1
  but the same code is in qemu 1.0

  "CPSID I" does not disable interrupts for CORTEX M3

  
  if (interrupt_request & CPU_INTERRUPT_HARD
                          && ((IS_M(env) && env->regs[15] < 0xfffffff0)
                              || !(env->uncached_cpsr & CPSR_I))) {
                          env->exception_index = EXCP_IRQ;
                          do_interrupt(env);
                          next_tb = 0;
                      }

  
  do_interrupt() will be executed even if (env->uncached_cpsr & CPSR_I) == 1 , disable interrupt bit set.

  
  then changed to: 

  if (interrupt_request & CPU_INTERRUPT_HARD 
                          && !(env->uncached_cpsr & CPSR_I)
                          && (IS_M(env) ? env->regs[15] < 0xfffffff0: 1) ) {
                          env->exception_index = EXCP_IRQ;
                          do_interrupt(env);
                          next_tb = 0;
                      }

  works

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^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2017-11-03 16:30 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2012-02-28 14:49 [Qemu-devel] [Bug 942659] [NEW] ARM: CORTEX M, PRIMASK does not disable interrupts Oleksiy Bondarenko
2012-02-28 15:12 ` [Qemu-devel] [Bug 942659] " Peter Maydell
2012-02-28 15:15 ` Peter Maydell
2017-11-03 16:17 ` Peter Maydell

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