From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:53935) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S73Cl-0003Bv-Ov for qemu-devel@nongnu.org; Mon, 12 Mar 2012 07:14:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1S73Cg-0002IV-W7 for qemu-devel@nongnu.org; Mon, 12 Mar 2012 07:14:19 -0400 Received: from mx1.redhat.com ([209.132.183.28]:46426) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1S73Cg-0002Hb-O4 for qemu-devel@nongnu.org; Mon, 12 Mar 2012 07:14:14 -0400 Date: Mon, 12 Mar 2012 13:14:10 +0200 From: Gleb Natapov Message-ID: <20120312111410.GA2304@redhat.com> References: <20120312093510.GA32194@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20120312093510.GA32194@redhat.com> Subject: Re: [Qemu-devel] [PATCH] acpi: beginnings of piix acpi interface doc List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: Alex Williamson , mtosatti@redhat.com, qemu-devel@nongnu.org, Anthony Liguori On Mon, Mar 12, 2012 at 11:35:29AM +0200, Michael S. Tsirkin wrote: > Before we start tweaking and enhancing hardware, I think > it makes sense to document what we currently have, to make > sure we stay compatible. > This documents the hotplug interface for piix. > Stubs for cpu hotplug, PM. > We already have docs/specs/acpi_pci_hotplug.txt, no? > Signed-off-by: Michael S. Tsirkin > --- > docs/acpi.txt | 32 ++++++++++++++++++++++++++++++++ > 1 files changed, 32 insertions(+), 0 deletions(-) > create mode 100644 docs/acpi.txt > > diff --git a/docs/acpi.txt b/docs/acpi.txt > new file mode 100644 > index 0000000..4938d48 > --- /dev/null > +++ b/docs/acpi.txt > @@ -0,0 +1,32 @@ > +QEMU exposes the following registers to guests, > +intended primarily for use by the ACPI interface. > + > +PCI Hotplug > +---- > + > +Events use the standard GPE register: > +GPE 0xafe0 - an ACPI GPE register > + > +Hotplug events set GPE bit 1 (mask 0x2) > + > +The following registers are used for PCI hotplug. > +Each register is 32 bit (4 bytes) long, and has little endian format. > +Bits 0-31 in each register correspond to slots 0-31 on the root bus, > +respectively. > + > +UP 0xae00 - RO - Bit set by host on device insertion (note:existing implementations > + trigger device check event) > +DOWN 0xae04 - RO - Bit set by host on user eject request > +EJ0 0xae08 - WO - Bit set by guest removes all power to device > +RMV 0xae0c - RO - Bit set by host if slot supports hotplug > + (can not change while guest is up) > + > + > +Power management > +---- > +TODO > + > + > +CPU hotplug > +---- > +TODO > -- > 1.7.9.111.gf3fb0 -- Gleb.