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Date: Fri, 4 May 2012 10:46:00 -0400
From: Kevin O'Connor <kevin@koconnor.net>
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Subject: Re: [Qemu-devel] [SeaBIOS] [seabios patch 0/5] dynamic pci i/o
 windows
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To: Gerd Hoffmann <kraxel@redhat.com>
Cc: seabios@seabios.org, qemu-devel@nongnu.org

On Fri, May 04, 2012 at 04:01:56PM +0200, Gerd Hoffmann wrote:
> On 05/04/12 15:18, Kevin O'Connor wrote:
> > On Fri, May 04, 2012 at 10:21:22AM +0200, Gerd Hoffmann wrote:
> >>   Hi,
> >>
> >> This patch series makes the PCI I/O windows runtime-configurable via
> >> qemu firmware config interface.  Main advantage is that we can size and
> >> shuffle around the PCI i/O windows according to the amount of memory the
> >> virtual machine has.  We don't need a hole for 64bit PCI bars, we can
> >> just map them above the main memory.  The hole for 32bit PCI bars can be
> >> enlarged for guests with less than 3.5 GB of memory.
> > 
> > Why pass in a PCI IO range through fw_cfg if SeaBIOS can figure out an
> > acceptable range from the amount of memory in the machine?
> 
> Suggestions on how to update the pci host bridge windows in the dsdt then?

Perhaps malloc_high() a struct with the info you need and then create
an OperationRegion() in the dynamically generated SSDT with the
address of the struct.

-Kevin