From: 陳韋任 <chenwj@iis.sinica.edu.tw>
To: Jia Liu <proljc@gmail.com>
Cc: "Andreas F酺ber" <afaerber@suse.de>, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 01/15] Openrisc: add target stub
Date: Fri, 18 May 2012 10:30:15 +0800 [thread overview]
Message-ID: <20120518023015.GA36131@cs.nctu.edu.tw> (raw)
In-Reply-To: <CAJBMM-vu=iwxC-3tbs-KECg_Etj51VGPpkFq_aN+GOz_XpCh4A@mail.gmail.com>
> > Pleave avoid unnecessary uppercase spelling: OpenRISCCPUClass? That
> > distinguishes it from the all-uppercase cast macros.
> >
> > Or OpenriscCPUClass as you spell it elsewhere?
> >
>
> I used OPENRISCCPU in the code, if it is not good, I can change it
> into OpenriscCPU.
I think OpenRISC is better [1].
Regards,
chenwj
[1] http://en.wikipedia.org/wiki/OpenRISC
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of Information Science,
Academia Sinica, Taiwan (R.O.C.)
Tel:886-2-2788-3799 #1667
Homepage: http://people.cs.nctu.edu.tw/~chenwj
next prev parent reply other threads:[~2012-05-18 2:30 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-17 8:35 [Qemu-devel] [PATCH 00/15] Qemu Openrisc support Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 01/15] Openrisc: add target stub Jia Liu
2012-05-17 9:38 ` 陳韋任
2012-05-17 14:14 ` Andreas Färber
2012-05-18 1:34 ` Jia Liu
2012-05-18 2:30 ` 陳韋任 [this message]
2012-05-18 2:56 ` 陳韋任
2012-05-20 14:14 ` Andreas Färber
2012-05-21 3:01 ` Jia Liu
2012-05-19 8:51 ` Blue Swirl
2012-05-20 14:11 ` Andreas Färber
2012-05-21 6:25 ` Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 02/15] Openrisc: add MMU support Jia Liu
2012-05-19 7:41 ` Blue Swirl
2012-05-21 6:24 ` Jia Liu
2012-05-21 9:03 ` 陳韋任
2012-05-21 17:41 ` Blue Swirl
2012-05-17 8:35 ` [Qemu-devel] [PATCH 03/15] Openrisc: add instructions translation Jia Liu
2012-05-17 12:11 ` Max Filippov
2012-05-18 1:04 ` Jia Liu
2012-05-18 3:53 ` 陳韋任
2012-05-18 10:33 ` Max Filippov
2012-05-19 10:02 ` Blue Swirl
2012-05-19 10:57 ` Peter Maydell
2012-05-19 11:29 ` Blue Swirl
2012-05-23 6:11 ` Jia Liu
2012-05-23 18:59 ` Blue Swirl
2012-05-25 23:50 ` Jia Liu
2012-05-26 0:37 ` Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 04/15] Openrisc: add interrupt support Jia Liu
2012-05-19 7:30 ` Blue Swirl
2012-05-23 7:06 ` Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 05/15] Openrisc: add exception support Jia Liu
2012-05-19 7:22 ` Blue Swirl
2012-05-23 7:09 ` Jia Liu
2012-05-23 19:11 ` Blue Swirl
2012-05-25 1:25 ` Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 06/15] Openrisc: add int instruction helpers Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 07/15] Openrisc: add float " Jia Liu
2012-05-19 8:29 ` Blue Swirl
2012-05-23 7:21 ` Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 08/15] Openrisc: add programmable interrupt controller support Jia Liu
2012-05-19 8:33 ` Blue Swirl
2012-05-17 8:35 ` [Qemu-devel] [PATCH 09/15] Openrisc: add timer support Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 10/15] Openrisc: add a simulation board Jia Liu
2012-05-19 7:51 ` Blue Swirl
2012-05-23 7:54 ` Jia Liu
2012-05-23 19:17 ` Blue Swirl
2012-05-25 2:31 ` Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 11/15] Openrisc: add system instruction helpers Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 12/15] Openrisc: add gdb stub support Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 13/15] Openrisc: add linux syscall, signal and termbits Jia Liu
2012-05-19 7:17 ` Blue Swirl
2012-05-19 8:57 ` Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 14/15] Openrisc: add linux user support Jia Liu
2012-05-17 8:35 ` [Qemu-devel] [PATCH 15/15] Openrisc: add testcases Jia Liu
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