[Qemu-devel] [PATCH 0/3] xilinx: Speed up the build

[Qemu-devel] [PATCH 0/3] xilinx: Speed up the build

[Andreas Färber]

Hello Edgar and Peter,

With the Makefile refactoring applied now, here's the Makefile improvements
for MicroBlaze I mentioned.

All Xilinx devices that are used for more than one softmmu are compiled once
in libhw32. Actually some also in libhw64 due to ppc440 being compiled into
ppc64, but we can fix that in a second step via Alex' ppc-next, we're already
down from thrice to twice.

The middle patch is extracted from Blue's logging refactoring.

Please test and apply. Your s3adp1800 and virtel_ml507 test images complain
both with and without patches about not finding "eth0". Selftest completes ok
except for not finding /usr/bin/sha1test on ppc440.

xilinx_ethlite.c uses tswap32(). Have you ever tested this device to work on
microblazeel? I wonder if we could change the device from DEVICE_NATIVE_ENDIAN
to DEVICE_BIG_ENDIAN and in place of tswap32() use a bswap32() conditional on
HOST_WORDS_BIGENDIAN so that it becomes independent of the target, too?

Instead of adding random devices to hw/microblaze/Makefile.objs in new series,
they should be added to hw/Makefile.objs with appropriate CONFIG_* options set
in default-configs/microblaze[el]-softmmu.mak as demonstrated here, easy to do
and also ensures that the appropriate poisoning is applied.

Regards,
Andreas

Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Cc: Peter A. G. Crosthwaite <peter.crothwaite@petalogix.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Blue Swirl <blauwirbel@gmail.com>

Andreas Färber (3):
  hw/xilinx_*: Share Xilinx devices between ppc and microblaze
  qemu-log: Allow usage in libhw
  xilinx_axi*: Share devices between microblaze and microblazeel

 default-configs/microblaze-softmmu.mak   |    2 ++
 default-configs/microblazeel-softmmu.mak |    2 ++
 default-configs/ppc-softmmu.mak          |    1 +
 default-configs/ppc64-softmmu.mak        |    1 +
 default-configs/ppcemb-softmmu.mak       |    1 +
 hw/Makefile.objs                         |    7 +++++++
 hw/microblaze/Makefile.objs              |    5 -----
 hw/ppc/Makefile.objs                     |    3 ---
 qemu-log.h                               |    2 ++
 9 files changed, 16 insertions(+), 8 deletions(-)

-- 
1.7.7

[Qemu-devel] [PATCH 1/3] hw/xilinx_*: Share Xilinx devices between ppc and microblaze

[Andreas Färber]

Speeds up the build.

xilinx_ethlite uses tswap32() and is thus target-dependent.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 default-configs/microblaze-softmmu.mak   |    1 +
 default-configs/microblazeel-softmmu.mak |    1 +
 default-configs/ppc-softmmu.mak          |    1 +
 default-configs/ppc64-softmmu.mak        |    1 +
 default-configs/ppcemb-softmmu.mak       |    1 +
 hw/Makefile.objs                         |    5 +++++
 hw/microblaze/Makefile.objs              |    3 ---
 hw/ppc/Makefile.objs                     |    3 ---
 8 files changed, 10 insertions(+), 6 deletions(-)

diff --git a/default-configs/microblaze-softmmu.mak b/default-configs/microblaze-softmmu.mak
index 613edab..08e7449 100644
--- a/default-configs/microblaze-softmmu.mak
+++ b/default-configs/microblaze-softmmu.mak
@@ -3,3 +3,4 @@
 CONFIG_PTIMER=y
 CONFIG_PFLASH_CFI01=y
 CONFIG_SERIAL=y
+CONFIG_XILINX=y
diff --git a/default-configs/microblazeel-softmmu.mak b/default-configs/microblazeel-softmmu.mak
index 4b40fb2..a9578e1 100644
--- a/default-configs/microblazeel-softmmu.mak
+++ b/default-configs/microblazeel-softmmu.mak
@@ -3,3 +3,4 @@
 CONFIG_PTIMER=y
 CONFIG_PFLASH_CFI01=y
 CONFIG_SERIAL=y
+CONFIG_XILINX=y
diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak
index 1a768fc..d0fde7b 100644
--- a/default-configs/ppc-softmmu.mak
+++ b/default-configs/ppc-softmmu.mak
@@ -36,3 +36,4 @@ CONFIG_PFLASH_CFI01=y
 CONFIG_PFLASH_CFI02=y
 CONFIG_PTIMER=y
 CONFIG_I8259=y
+CONFIG_XILINX=y
diff --git a/default-configs/ppc64-softmmu.mak b/default-configs/ppc64-softmmu.mak
index f490368..e4265b4 100644
--- a/default-configs/ppc64-softmmu.mak
+++ b/default-configs/ppc64-softmmu.mak
@@ -33,3 +33,4 @@ CONFIG_PFLASH_CFI01=y
 CONFIG_PFLASH_CFI02=y
 CONFIG_PTIMER=y
 CONFIG_I8259=y
+CONFIG_XILINX=y
diff --git a/default-configs/ppcemb-softmmu.mak b/default-configs/ppcemb-softmmu.mak
index 829f462..aaa9cdc 100644
--- a/default-configs/ppcemb-softmmu.mak
+++ b/default-configs/ppcemb-softmmu.mak
@@ -33,3 +33,4 @@ CONFIG_PFLASH_CFI01=y
 CONFIG_PFLASH_CFI02=y
 CONFIG_PTIMER=y
 CONFIG_I8259=y
+CONFIG_XILINX=y
diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index 7e17504..102ebcf 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -59,6 +59,11 @@ hw-obj-$(CONFIG_PIIX4) += piix4.o
 hw-obj-$(CONFIG_G364FB) += g364fb.o
 hw-obj-$(CONFIG_JAZZ_LED) += jazz_led.o
 
+# Xilinx devices
+hw-obj-$(CONFIG_XILINX) += xilinx_intc.o
+hw-obj-$(CONFIG_XILINX) += xilinx_timer.o
+hw-obj-$(CONFIG_XILINX) += xilinx_uartlite.o
+
 # PCI watchdog devices
 hw-obj-$(CONFIG_PCI) += wdt_i6300esb.o
 
diff --git a/hw/microblaze/Makefile.objs b/hw/microblaze/Makefile.objs
index 020f7b6..59ea20f 100644
--- a/hw/microblaze/Makefile.objs
+++ b/hw/microblaze/Makefile.objs
@@ -3,9 +3,6 @@ obj-y += petalogix_ml605_mmu.o
 obj-y += microblaze_boot.o
 
 obj-y += microblaze_pic_cpu.o
-obj-y += xilinx_intc.o
-obj-y += xilinx_timer.o
-obj-y += xilinx_uartlite.o
 obj-y += xilinx_ethlite.o
 obj-y += xilinx_axidma.o
 obj-y += xilinx_axienet.o
diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs
index 842e7b9..6f5757f 100644
--- a/hw/ppc/Makefile.objs
+++ b/hw/ppc/Makefile.objs
@@ -24,9 +24,6 @@ obj-y += openpic.o
 obj-$(CONFIG_FDT) += ../device_tree.o
 
 # Xilinx PPC peripherals
-obj-y += xilinx_intc.o
-obj-y += xilinx_timer.o
-obj-y += xilinx_uartlite.o
 obj-y += xilinx_ethlite.o
 
 obj-y := $(addprefix ../,$(obj-y))
-- 
1.7.7

Re: [Qemu-devel] [PATCH 1/3] hw/xilinx_*: Share Xilinx devices between ppc and microblaze

[Peter Crosthwaite]

On Sat, Jun 9, 2012 at 11:54 AM, Andreas Färber <afaerber@suse.de> wrote:
> Speeds up the build.
>
> xilinx_ethlite uses tswap32() and is thus target-dependent.
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  default-configs/microblaze-softmmu.mak   |    1 +
>  default-configs/microblazeel-softmmu.mak |    1 +
>  default-configs/ppc-softmmu.mak          |    1 +
>  default-configs/ppc64-softmmu.mak        |    1 +
>  default-configs/ppcemb-softmmu.mak       |    1 +
>  hw/Makefile.objs                         |    5 +++++
>  hw/microblaze/Makefile.objs              |    3 ---
>  hw/ppc/Makefile.objs                     |    3 ---
>  8 files changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/default-configs/microblaze-softmmu.mak b/default-configs/microblaze-softmmu.mak
> index 613edab..08e7449 100644
> --- a/default-configs/microblaze-softmmu.mak
> +++ b/default-configs/microblaze-softmmu.mak
> @@ -3,3 +3,4 @@
>  CONFIG_PTIMER=y
>  CONFIG_PFLASH_CFI01=y
>  CONFIG_SERIAL=y
> +CONFIG_XILINX=y
> diff --git a/default-configs/microblazeel-softmmu.mak b/default-configs/microblazeel-softmmu.mak
> index 4b40fb2..a9578e1 100644
> --- a/default-configs/microblazeel-softmmu.mak
> +++ b/default-configs/microblazeel-softmmu.mak
> @@ -3,3 +3,4 @@
>  CONFIG_PTIMER=y
>  CONFIG_PFLASH_CFI01=y
>  CONFIG_SERIAL=y
> +CONFIG_XILINX=y
> diff --git a/default-configs/ppc-softmmu.mak b/default-configs/ppc-softmmu.mak
> index 1a768fc..d0fde7b 100644
> --- a/default-configs/ppc-softmmu.mak
> +++ b/default-configs/ppc-softmmu.mak
> @@ -36,3 +36,4 @@ CONFIG_PFLASH_CFI01=y
>  CONFIG_PFLASH_CFI02=y
>  CONFIG_PTIMER=y
>  CONFIG_I8259=y
> +CONFIG_XILINX=y
> diff --git a/default-configs/ppc64-softmmu.mak b/default-configs/ppc64-softmmu.mak
> index f490368..e4265b4 100644
> --- a/default-configs/ppc64-softmmu.mak
> +++ b/default-configs/ppc64-softmmu.mak
> @@ -33,3 +33,4 @@ CONFIG_PFLASH_CFI01=y
>  CONFIG_PFLASH_CFI02=y
>  CONFIG_PTIMER=y
>  CONFIG_I8259=y
> +CONFIG_XILINX=y
> diff --git a/default-configs/ppcemb-softmmu.mak b/default-configs/ppcemb-softmmu.mak
> index 829f462..aaa9cdc 100644
> --- a/default-configs/ppcemb-softmmu.mak
> +++ b/default-configs/ppcemb-softmmu.mak
> @@ -33,3 +33,4 @@ CONFIG_PFLASH_CFI01=y
>  CONFIG_PFLASH_CFI02=y
>  CONFIG_PTIMER=y
>  CONFIG_I8259=y
> +CONFIG_XILINX=y
> diff --git a/hw/Makefile.objs b/hw/Makefile.objs
> index 7e17504..102ebcf 100644
> --- a/hw/Makefile.objs
> +++ b/hw/Makefile.objs
> @@ -59,6 +59,11 @@ hw-obj-$(CONFIG_PIIX4) += piix4.o
>  hw-obj-$(CONFIG_G364FB) += g364fb.o
>  hw-obj-$(CONFIG_JAZZ_LED) += jazz_led.o
>
> +# Xilinx devices
> +hw-obj-$(CONFIG_XILINX) += xilinx_intc.o
> +hw-obj-$(CONFIG_XILINX) += xilinx_timer.o
> +hw-obj-$(CONFIG_XILINX) += xilinx_uartlite.o
> +

Hi Andreas,

whats the plan with xilinx_axidma xilinx_axienet and  xilinx_ethlite?
Should be fold them into this CONFIG_  or are these the exceptions to
the rule as they are the annoying endian dependent ones?

Regards,
Peter

>  # PCI watchdog devices
>  hw-obj-$(CONFIG_PCI) += wdt_i6300esb.o
>
> diff --git a/hw/microblaze/Makefile.objs b/hw/microblaze/Makefile.objs
> index 020f7b6..59ea20f 100644
> --- a/hw/microblaze/Makefile.objs
> +++ b/hw/microblaze/Makefile.objs
> @@ -3,9 +3,6 @@ obj-y += petalogix_ml605_mmu.o
>  obj-y += microblaze_boot.o
>
>  obj-y += microblaze_pic_cpu.o
> -obj-y += xilinx_intc.o
> -obj-y += xilinx_timer.o
> -obj-y += xilinx_uartlite.o
>  obj-y += xilinx_ethlite.o
>  obj-y += xilinx_axidma.o
>  obj-y += xilinx_axienet.o
> diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs
> index 842e7b9..6f5757f 100644
> --- a/hw/ppc/Makefile.objs
> +++ b/hw/ppc/Makefile.objs
> @@ -24,9 +24,6 @@ obj-y += openpic.o
>  obj-$(CONFIG_FDT) += ../device_tree.o
>
>  # Xilinx PPC peripherals
> -obj-y += xilinx_intc.o
> -obj-y += xilinx_timer.o
> -obj-y += xilinx_uartlite.o
>  obj-y += xilinx_ethlite.o
>
>  obj-y := $(addprefix ../,$(obj-y))
> --
> 1.7.7
>
>

Re: [Qemu-devel] [PATCH 1/3] hw/xilinx_*: Share Xilinx devices between ppc and microblaze

[Andreas Färber]

Hi,

Am 09.06.2012 04:15, schrieb Peter Crosthwaite:
> On Sat, Jun 9, 2012 at 11:54 AM, Andreas Färber <afaerber@suse.de> wrote:
>> Speeds up the build.
>>
>> xilinx_ethlite uses tswap32() and is thus target-dependent.
>>
>> Signed-off-by: Andreas Färber <afaerber@suse.de>
[...]
>> --- a/hw/Makefile.objs
>> +++ b/hw/Makefile.objs
>> @@ -59,6 +59,11 @@ hw-obj-$(CONFIG_PIIX4) += piix4.o
>>  hw-obj-$(CONFIG_G364FB) += g364fb.o
>>  hw-obj-$(CONFIG_JAZZ_LED) += jazz_led.o
>>
>> +# Xilinx devices
>> +hw-obj-$(CONFIG_XILINX) += xilinx_intc.o
>> +hw-obj-$(CONFIG_XILINX) += xilinx_timer.o
>> +hw-obj-$(CONFIG_XILINX) += xilinx_uartlite.o
>> +
> 
> whats the plan with xilinx_axidma xilinx_axienet and  xilinx_ethlite?
> Should be fold them into this CONFIG_  or are these the exceptions to
> the rule as they are the annoying endian dependent ones?

The axi ones are in patch 3/3 as they are only used for microblaze, not
ppc, and they use qemu-log.h. Designed for pick-from-the-front*. :)

The ethlite has the endianness issue described in the cover letter. Once
solved, I'd expect it to be folded into CONFIG_XILINX as well, yes.

Obviously if you have better variable naming, feel free to suggest or to
change before Edgar applies, my stake is only that the variable names
match in both places and that we achieve some deduplification.

Cheers,
Andreas

* Depending on whether this or Blue's series goes in first, in which
case 2/3 gets obsoleted.

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH 1/3] hw/xilinx_*: Share Xilinx devices between ppc and microblaze

[Peter Crosthwaite]

On Sat, Jun 9, 2012 at 12:31 PM, Andreas Färber <afaerber@suse.de> wrote:
> Hi,
>
> Am 09.06.2012 04:15, schrieb Peter Crosthwaite:
>> On Sat, Jun 9, 2012 at 11:54 AM, Andreas Färber <afaerber@suse.de> wrote:
>>> Speeds up the build.
>>>
>>> xilinx_ethlite uses tswap32() and is thus target-dependent.
>>>
>>> Signed-off-by: Andreas Färber <afaerber@suse.de>
> [...]
>>> --- a/hw/Makefile.objs
>>> +++ b/hw/Makefile.objs
>>> @@ -59,6 +59,11 @@ hw-obj-$(CONFIG_PIIX4) += piix4.o
>>>  hw-obj-$(CONFIG_G364FB) += g364fb.o
>>>  hw-obj-$(CONFIG_JAZZ_LED) += jazz_led.o
>>>
>>> +# Xilinx devices
>>> +hw-obj-$(CONFIG_XILINX) += xilinx_intc.o
>>> +hw-obj-$(CONFIG_XILINX) += xilinx_timer.o
>>> +hw-obj-$(CONFIG_XILINX) += xilinx_uartlite.o
>>> +
>>
>> whats the plan with xilinx_axidma xilinx_axienet and  xilinx_ethlite?
>> Should be fold them into this CONFIG_  or are these the exceptions to
>> the rule as they are the annoying endian dependent ones?
>
> The axi ones are in patch 3/3 as they are only used for microblaze, not
> ppc, and they use qemu-log.h. Designed for pick-from-the-front*. :)
>
> The ethlite has the endianness issue described in the cover letter. Once
> solved, I'd expect it to be folded into CONFIG_XILINX as well, yes.
>
> Obviously if you have better variable naming,

CONFIG_XILINX is kinda vague, this is really referring to the XILINX
EDK IP suite. Now that zynq has landed "xilinx" is ambiguous between
the two platform families. Edgar do you have any preference? perhaps
CONFIG_XILINX_IP?

 feel free to suggest or to
> change before Edgar applies, my stake is only that the variable names
> match in both places and that we achieve some deduplification.
>
> Cheers,
> Andreas
>
> * Depending on whether this or Blue's series goes in first, in which
> case 2/3 gets obsoleted.
>
> --
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

[Qemu-devel] [PATCH 2/3] qemu-log: Allow usage in libhw

[Andreas Färber]

Add #ifdef to avoid complaint about use of poisoned "env".

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 qemu-log.h |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/qemu-log.h b/qemu-log.h
index fccfb110..a9b3ca4 100644
--- a/qemu-log.h
+++ b/qemu-log.h
@@ -50,6 +50,7 @@ extern int loglevel;
 
 /* Special cases: */
 
+#ifdef NEED_CPU_H
 /* cpu_dump_state() logging functions: */
 #define log_cpu_state(env, f) cpu_dump_state((env), logfile, fprintf, (f));
 #define log_cpu_state_mask(b, env, f) do {           \
@@ -64,6 +65,7 @@ extern int loglevel;
 
 /* page_dump() output to the log file: */
 #define log_page_dump() page_dump(logfile)
+#endif
 
 
 
-- 
1.7.7

[Qemu-devel] [PATCH 3/3] xilinx_axi*: Share devices between microblaze and microblazeel

[Andreas Färber]

Speeds up the build.

Signed-off-by: Andreas Färber <afaerber@suse.de>
---
 default-configs/microblaze-softmmu.mak   |    1 +
 default-configs/microblazeel-softmmu.mak |    1 +
 hw/Makefile.objs                         |    2 ++
 hw/microblaze/Makefile.objs              |    2 --
 4 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/default-configs/microblaze-softmmu.mak b/default-configs/microblaze-softmmu.mak
index 08e7449..64c9485 100644
--- a/default-configs/microblaze-softmmu.mak
+++ b/default-configs/microblaze-softmmu.mak
@@ -4,3 +4,4 @@ CONFIG_PTIMER=y
 CONFIG_PFLASH_CFI01=y
 CONFIG_SERIAL=y
 CONFIG_XILINX=y
+CONFIG_XILINX_AXI=y
diff --git a/default-configs/microblazeel-softmmu.mak b/default-configs/microblazeel-softmmu.mak
index a9578e1..a962276 100644
--- a/default-configs/microblazeel-softmmu.mak
+++ b/default-configs/microblazeel-softmmu.mak
@@ -4,3 +4,4 @@ CONFIG_PTIMER=y
 CONFIG_PFLASH_CFI01=y
 CONFIG_SERIAL=y
 CONFIG_XILINX=y
+CONFIG_XILINX_AXI=y
diff --git a/hw/Makefile.objs b/hw/Makefile.objs
index 102ebcf..3d77259 100644
--- a/hw/Makefile.objs
+++ b/hw/Makefile.objs
@@ -63,6 +63,8 @@ hw-obj-$(CONFIG_JAZZ_LED) += jazz_led.o
 hw-obj-$(CONFIG_XILINX) += xilinx_intc.o
 hw-obj-$(CONFIG_XILINX) += xilinx_timer.o
 hw-obj-$(CONFIG_XILINX) += xilinx_uartlite.o
+hw-obj-$(CONFIG_XILINX_AXI) += xilinx_axidma.o
+hw-obj-$(CONFIG_XILINX_AXI) += xilinx_axienet.o
 
 # PCI watchdog devices
 hw-obj-$(CONFIG_PCI) += wdt_i6300esb.o
diff --git a/hw/microblaze/Makefile.objs b/hw/microblaze/Makefile.objs
index 59ea20f..274d2c5 100644
--- a/hw/microblaze/Makefile.objs
+++ b/hw/microblaze/Makefile.objs
@@ -4,8 +4,6 @@ obj-y += microblaze_boot.o
 
 obj-y += microblaze_pic_cpu.o
 obj-y += xilinx_ethlite.o
-obj-y += xilinx_axidma.o
-obj-y += xilinx_axienet.o
 obj-$(CONFIG_FDT) += ../device_tree.o
 
 obj-y := $(addprefix ../,$(obj-y))
-- 
1.7.7

Re: [Qemu-devel] [PATCH 3/3] xilinx_axi*: Share devices between microblaze and microblazeel

[Peter Crosthwaite]

On Sat, Jun 9, 2012 at 11:54 AM, Andreas Färber <afaerber@suse.de> wrote:
> Speeds up the build.
>
> Signed-off-by: Andreas Färber <afaerber@suse.de>
> ---
>  default-configs/microblaze-softmmu.mak   |    1 +
>  default-configs/microblazeel-softmmu.mak |    1 +
>  hw/Makefile.objs                         |    2 ++
>  hw/microblaze/Makefile.objs              |    2 --
>  4 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/default-configs/microblaze-softmmu.mak b/default-configs/microblaze-softmmu.mak
> index 08e7449..64c9485 100644
> --- a/default-configs/microblaze-softmmu.mak
> +++ b/default-configs/microblaze-softmmu.mak
> @@ -4,3 +4,4 @@ CONFIG_PTIMER=y
>  CONFIG_PFLASH_CFI01=y
>  CONFIG_SERIAL=y
>  CONFIG_XILINX=y
> +CONFIG_XILINX_AXI=y
> diff --git a/default-configs/microblazeel-softmmu.mak b/default-configs/microblazeel-softmmu.mak
> index a9578e1..a962276 100644
> --- a/default-configs/microblazeel-softmmu.mak
> +++ b/default-configs/microblazeel-softmmu.mak
> @@ -4,3 +4,4 @@ CONFIG_PTIMER=y
>  CONFIG_PFLASH_CFI01=y
>  CONFIG_SERIAL=y
>  CONFIG_XILINX=y
> +CONFIG_XILINX_AXI=y
> diff --git a/hw/Makefile.objs b/hw/Makefile.objs
> index 102ebcf..3d77259 100644
> --- a/hw/Makefile.objs
> +++ b/hw/Makefile.objs
> @@ -63,6 +63,8 @@ hw-obj-$(CONFIG_JAZZ_LED) += jazz_led.o
>  hw-obj-$(CONFIG_XILINX) += xilinx_intc.o
>  hw-obj-$(CONFIG_XILINX) += xilinx_timer.o
>  hw-obj-$(CONFIG_XILINX) += xilinx_uartlite.o
> +hw-obj-$(CONFIG_XILINX_AXI) += xilinx_axidma.o
> +hw-obj-$(CONFIG_XILINX_AXI) += xilinx_axienet.o
>

Ahh nvm, got it.

>  # PCI watchdog devices
>  hw-obj-$(CONFIG_PCI) += wdt_i6300esb.o
> diff --git a/hw/microblaze/Makefile.objs b/hw/microblaze/Makefile.objs
> index 59ea20f..274d2c5 100644
> --- a/hw/microblaze/Makefile.objs
> +++ b/hw/microblaze/Makefile.objs
> @@ -4,8 +4,6 @@ obj-y += microblaze_boot.o
>
>  obj-y += microblaze_pic_cpu.o
>  obj-y += xilinx_ethlite.o
> -obj-y += xilinx_axidma.o
> -obj-y += xilinx_axienet.o
>  obj-$(CONFIG_FDT) += ../device_tree.o
>
>  obj-y := $(addprefix ../,$(obj-y))
> --
> 1.7.7
>
>

Re: [Qemu-devel] [PATCH 0/3] xilinx: Speed up the build

[Peter Crosthwaite]

On Sat, Jun 9, 2012 at 11:54 AM, Andreas Färber <afaerber@suse.de> wrote:
> Hello Edgar and Peter,
>
> With the Makefile refactoring applied now, here's the Makefile improvements
> for MicroBlaze I mentioned.
>
> All Xilinx devices that are used for more than one softmmu are compiled once
> in libhw32. Actually some also in libhw64 due to ppc440 being compiled into
> ppc64, but we can fix that in a second step via Alex' ppc-next, we're already
> down from thrice to twice.
>
> The middle patch is extracted from Blue's logging refactoring.
>
> Please test and apply. Your s3adp1800 and virtel_ml507 test images complain
> both with and without patches about not finding "eth0". Selftest completes ok
> except for not finding /usr/bin/sha1test on ppc440.
>

I am sitting on a microblaze little endian test vector (for
petalogix-ml605), which is my primary test. I think that probably
needs to go up on qemu.org? Whats the process there?

> xilinx_ethlite.c uses tswap32(). Have you ever tested this device to work on
> microblazeel?

Yes, we have in our tree, but probably not exactly the mainline
version. I am working on a machine model that will bring this in the
play, so could we revisit this one shortly?

 I wonder if we could change the device from DEVICE_NATIVE_ENDIAN
> to DEVICE_BIG_ENDIAN and in place of tswap32() use a bswap32() conditional on
> HOST_WORDS_BIGENDIAN so that it becomes independent of the target, too?
>
> Instead of adding random devices to hw/microblaze/Makefile.objs in new series,
> they should be added to hw/Makefile.objs with appropriate CONFIG_* options set
> in default-configs/microblaze[el]-softmmu.mak as demonstrated here, easy to do
> and also ensures that the appropriate poisoning is applied.
>

Will factor into subsequent revisions of my pending series'.

Regards, Peter

> Regards,
> Andreas
>
> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
> Cc: Peter A. G. Crosthwaite <peter.crothwaite@petalogix.com>
> Cc: Alexander Graf <agraf@suse.de>
> Cc: Blue Swirl <blauwirbel@gmail.com>
>
> Andreas Färber (3):
>  hw/xilinx_*: Share Xilinx devices between ppc and microblaze
>  qemu-log: Allow usage in libhw
>  xilinx_axi*: Share devices between microblaze and microblazeel
>
>  default-configs/microblaze-softmmu.mak   |    2 ++
>  default-configs/microblazeel-softmmu.mak |    2 ++
>  default-configs/ppc-softmmu.mak          |    1 +
>  default-configs/ppc64-softmmu.mak        |    1 +
>  default-configs/ppcemb-softmmu.mak       |    1 +
>  hw/Makefile.objs                         |    7 +++++++
>  hw/microblaze/Makefile.objs              |    5 -----
>  hw/ppc/Makefile.objs                     |    3 ---
>  qemu-log.h                               |    2 ++
>  9 files changed, 16 insertions(+), 8 deletions(-)
>
> --
> 1.7.7
>
>

Re: [Qemu-devel] [PATCH 0/3] xilinx: Speed up the build

[Edgar E. Iglesias]

On Sat, Jun 09, 2012 at 03:54:28AM +0200, Andreas Färber wrote:
> Hello Edgar and Peter,
> 
> With the Makefile refactoring applied now, here's the Makefile improvements
> for MicroBlaze I mentioned.
> 
> All Xilinx devices that are used for more than one softmmu are compiled once
> in libhw32. Actually some also in libhw64 due to ppc440 being compiled into
> ppc64, but we can fix that in a second step via Alex' ppc-next, we're already
> down from thrice to twice.
> 
> The middle patch is extracted from Blue's logging refactoring.
> 
> Please test and apply. Your s3adp1800 and virtel_ml507 test images complain
> both with and without patches about not finding "eth0". Selftest completes ok
> except for not finding /usr/bin/sha1test on ppc440.

Thanks, I'll give these a try next week!

> 
> xilinx_ethlite.c uses tswap32(). Have you ever tested this device to work on
> microblazeel? I wonder if we could change the device from DEVICE_NATIVE_ENDIAN
> to DEVICE_BIG_ENDIAN and in place of tswap32() use a bswap32() conditional on
> HOST_WORDS_BIGENDIAN so that it becomes independent of the target, too?

I don't think that will work. the swap is needed if the endianness of the host
is different from the one of the target...

IIRC, the issue is that the device has a built-in RAM mapped so close to
the regs that they end up in the same "page". With Avis memory-api maybe it's
possible to expose this sub-page area as a memory?

Cheers

Re: [Qemu-devel] [PATCH 0/3] xilinx: Speed up the build

[Andreas Färber]

Am 09.06.2012 17:20, schrieb Edgar E. Iglesias:
> On Sat, Jun 09, 2012 at 03:54:28AM +0200, Andreas Färber wrote:
>> xilinx_ethlite.c uses tswap32(). Have you ever tested this device to work on
>> microblazeel? I wonder if we could change the device from DEVICE_NATIVE_ENDIAN
>> to DEVICE_BIG_ENDIAN and in place of tswap32() use a bswap32() conditional on
>> HOST_WORDS_BIGENDIAN so that it becomes independent of the target, too?
> 
> I don't think that will work. the swap is needed if the endianness of the host
> is different from the one of the target...

My thinking was: If we can force the device endianness to a known value
then only the host endianness (not the target endianness) matters
because the Memory API will take care of the device endianness.

The question is: Is the device LE for microblazeel or is it always BE?

> IIRC, the issue is that the device has a built-in RAM mapped so close to
> the regs that they end up in the same "page". With Avis memory-api maybe it's
> possible to expose this sub-page area as a memory?

Me and Avi fixed some bugs for subpage areas, it should work in theory
(for TCG/qtest). Not being aware of a MicroBlaze KVM, if it's a RAM
region then we should definitely model it as such.

Cheers,
Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH 0/3] xilinx: Speed up the build

[Edgar E. Iglesias]

On Sat, Jun 09, 2012 at 05:31:39PM +0200, Andreas Färber wrote:
> Am 09.06.2012 17:20, schrieb Edgar E. Iglesias:
> > On Sat, Jun 09, 2012 at 03:54:28AM +0200, Andreas Färber wrote:
> >> xilinx_ethlite.c uses tswap32(). Have you ever tested this device to work on
> >> microblazeel? I wonder if we could change the device from DEVICE_NATIVE_ENDIAN
> >> to DEVICE_BIG_ENDIAN and in place of tswap32() use a bswap32() conditional on
> >> HOST_WORDS_BIGENDIAN so that it becomes independent of the target, too?
> > 
> > I don't think that will work. the swap is needed if the endianness of the host
> > is different from the one of the target...
> 
> My thinking was: If we can force the device endianness to a known value
> then only the host endianness (not the target endianness) matters
> because the Memory API will take care of the device endianness.
> 
> The question is: Is the device LE for microblazeel or is it always BE?

It can be both LE and BE

> 
> > IIRC, the issue is that the device has a built-in RAM mapped so close to
> > the regs that they end up in the same "page". With Avis memory-api maybe it's
> > possible to expose this sub-page area as a memory?
> 
> Me and Avi fixed some bugs for subpage areas, it should work in theory
> (for TCG/qtest). Not being aware of a MicroBlaze KVM, if it's a RAM
> region then we should definitely model it as such.

If that's possible, that would get rid of the swaps

Cheers

Re: [Qemu-devel] [PATCH 0/3] xilinx: Speed up the build

[Edgar E. Iglesias]

On Sat, Jun 09, 2012 at 03:54:28AM +0200, Andreas Färber wrote:
> Hello Edgar and Peter,
> 
> With the Makefile refactoring applied now, here's the Makefile improvements
> for MicroBlaze I mentioned.
> 
> All Xilinx devices that are used for more than one softmmu are compiled once
> in libhw32. Actually some also in libhw64 due to ppc440 being compiled into
> ppc64, but we can fix that in a second step via Alex' ppc-next, we're already
> down from thrice to twice.
> 
> The middle patch is extracted from Blue's logging refactoring.
> 
> Please test and apply. Your s3adp1800 and virtel_ml507 test images complain
> both with and without patches about not finding "eth0". Selftest completes ok
> except for not finding /usr/bin/sha1test on ppc440.
> 
> xilinx_ethlite.c uses tswap32(). Have you ever tested this device to work on
> microblazeel? I wonder if we could change the device from DEVICE_NATIVE_ENDIAN
> to DEVICE_BIG_ENDIAN and in place of tswap32() use a bswap32() conditional on
> HOST_WORDS_BIGENDIAN so that it becomes independent of the target, too?
> 
> Instead of adding random devices to hw/microblaze/Makefile.objs in new series,
> they should be added to hw/Makefile.objs with appropriate CONFIG_* options set
> in default-configs/microblaze[el]-softmmu.mak as demonstrated here, easy to do
> and also ensures that the appropriate poisoning is applied.

Applied the series, thanks Andreas.


> 
> Regards,
> Andreas
> 
> Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>
> Cc: Peter A. G. Crosthwaite <peter.crothwaite@petalogix.com>
> Cc: Alexander Graf <agraf@suse.de>
> Cc: Blue Swirl <blauwirbel@gmail.com>
> 
> Andreas Färber (3):
>   hw/xilinx_*: Share Xilinx devices between ppc and microblaze
>   qemu-log: Allow usage in libhw
>   xilinx_axi*: Share devices between microblaze and microblazeel
> 
>  default-configs/microblaze-softmmu.mak   |    2 ++
>  default-configs/microblazeel-softmmu.mak |    2 ++
>  default-configs/ppc-softmmu.mak          |    1 +
>  default-configs/ppc64-softmmu.mak        |    1 +
>  default-configs/ppcemb-softmmu.mak       |    1 +
>  hw/Makefile.objs                         |    7 +++++++
>  hw/microblaze/Makefile.objs              |    5 -----
>  hw/ppc/Makefile.objs                     |    3 ---
>  qemu-log.h                               |    2 ++
>  9 files changed, 16 insertions(+), 8 deletions(-)
> 
> -- 
> 1.7.7
> 

Re: [Qemu-devel] [PATCH 0/3] xilinx: Speed up the build

[Andreas Färber]

Am 15.06.2012 13:13, schrieb Edgar E. Iglesias:
> On Sat, Jun 09, 2012 at 03:54:28AM +0200, Andreas Färber wrote:
>> Hello Edgar and Peter,
>>
>> With the Makefile refactoring applied now, here's the Makefile improvements
>> for MicroBlaze I mentioned.
>>
>> All Xilinx devices that are used for more than one softmmu are compiled once
>> in libhw32. Actually some also in libhw64 due to ppc440 being compiled into
>> ppc64, but we can fix that in a second step via Alex' ppc-next, we're already
>> down from thrice to twice.
>>
>> The middle patch is extracted from Blue's logging refactoring.
>>
>> Please test and apply. Your s3adp1800 and virtel_ml507 test images complain
>> both with and without patches about not finding "eth0". Selftest completes ok
>> except for not finding /usr/bin/sha1test on ppc440.
>>
>> xilinx_ethlite.c uses tswap32(). Have you ever tested this device to work on
>> microblazeel? I wonder if we could change the device from DEVICE_NATIVE_ENDIAN
>> to DEVICE_BIG_ENDIAN and in place of tswap32() use a bswap32() conditional on
>> HOST_WORDS_BIGENDIAN so that it becomes independent of the target, too?
>>
>> Instead of adding random devices to hw/microblaze/Makefile.objs in new series,
>> they should be added to hw/Makefile.objs with appropriate CONFIG_* options set
>> in default-configs/microblaze[el]-softmmu.mak as demonstrated here, easy to do
>> and also ensures that the appropriate poisoning is applied.
> 
> Applied the series, thanks Andreas.

Thanks, but didn't you want CONFIG_XILINX renamed? :)

Andreas

-- 
SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg

Re: [Qemu-devel] [PATCH 0/3] xilinx: Speed up the build

[Peter Crosthwaite]

On Sat, Jun 16, 2012 at 12:52 AM, Andreas Färber <afaerber@suse.de> wrote:
> Am 15.06.2012 13:13, schrieb Edgar E. Iglesias:
>> On Sat, Jun 09, 2012 at 03:54:28AM +0200, Andreas Färber wrote:
>>> Hello Edgar and Peter,
>>>
>>> With the Makefile refactoring applied now, here's the Makefile improvements
>>> for MicroBlaze I mentioned.
>>>
>>> All Xilinx devices that are used for more than one softmmu are compiled once
>>> in libhw32. Actually some also in libhw64 due to ppc440 being compiled into
>>> ppc64, but we can fix that in a second step via Alex' ppc-next, we're already
>>> down from thrice to twice.
>>>
>>> The middle patch is extracted from Blue's logging refactoring.
>>>
>>> Please test and apply. Your s3adp1800 and virtel_ml507 test images complain
>>> both with and without patches about not finding "eth0". Selftest completes ok
>>> except for not finding /usr/bin/sha1test on ppc440.
>>>
>>> xilinx_ethlite.c uses tswap32(). Have you ever tested this device to work on
>>> microblazeel? I wonder if we could change the device from DEVICE_NATIVE_ENDIAN
>>> to DEVICE_BIG_ENDIAN and in place of tswap32() use a bswap32() conditional on
>>> HOST_WORDS_BIGENDIAN so that it becomes independent of the target, too?
>>>
>>> Instead of adding random devices to hw/microblaze/Makefile.objs in new series,
>>> they should be added to hw/Makefile.objs with appropriate CONFIG_* options set
>>> in default-configs/microblaze[el]-softmmu.mak as demonstrated here, easy to do
>>> and also ensures that the appropriate poisoning is applied.
>>
>> Applied the series, thanks Andreas.
>
> Thanks, but didn't you want CONFIG_XILINX renamed? :)
>

Hi Andreas,

Its a minor issue, probably best fixed incrementally when the need arises.

Regards,
Peter

> Andreas
>
> --
> SUSE LINUX Products GmbH, Maxfeldstr. 5, 90409 Nürnberg, Germany
> GF: Jeff Hawn, Jennifer Guild, Felix Imendörffer; HRB 16746 AG Nürnberg
>