From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:54727) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SfEax-0005lE-EB for qemu-devel@nongnu.org; Thu, 14 Jun 2012 14:16:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SfEav-0007mL-9V for qemu-devel@nongnu.org; Thu, 14 Jun 2012 14:16:34 -0400 Received: from mx1.redhat.com ([209.132.183.28]:59051) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SfEav-0007lx-1G for qemu-devel@nongnu.org; Thu, 14 Jun 2012 14:16:33 -0400 From: Alex Williamson Date: Thu, 14 Jun 2012 12:16:28 -0600 Message-ID: <20120614181627.23440.46436.stgit@bling.home> In-Reply-To: <20120614181104.23440.62204.stgit@bling.home> References: <20120614181104.23440.62204.stgit@bling.home> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] [PATCH v3 5/8] msix: Note endian TODO item List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: mst@redhat.com Cc: jan.kiszka@siemens.com, qemu-devel@nongnu.org MSIX, like PCI, is little endian. Specifying native is wrong here, but we need to check the rest of the file to determine if it's as simple as flipping this macro. Signed-off-by: Alex Williamson --- hw/msix.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/msix.c b/hw/msix.c index 50885ac..87d316a 100644 --- a/hw/msix.c +++ b/hw/msix.c @@ -224,6 +224,7 @@ static void msix_mmio_write(void *opaque, target_phys_addr_t addr, static const MemoryRegionOps msix_mmio_ops = { .read = msix_mmio_read, .write = msix_mmio_write, + /* TODO: MSIX should be LITTLE_ENDIAN. */ .endianness = DEVICE_NATIVE_ENDIAN, .valid = { .min_access_size = 4,