From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:41269) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SySeK-0006IB-Kw for qemu-devel@nongnu.org; Mon, 06 Aug 2012 15:07:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1SySeJ-0002xs-Bv for qemu-devel@nongnu.org; Mon, 06 Aug 2012 15:07:32 -0400 Received: from mail.windriver.com ([147.11.1.11]:53081) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1SySeJ-0002xe-2x for qemu-devel@nongnu.org; Mon, 06 Aug 2012 15:07:31 -0400 Received: from ALA-HCA.corp.ad.wrs.com (ala-hca [147.11.189.40]) by mail.windriver.com (8.14.5/8.14.3) with ESMTP id q76ILsCJ013579 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=FAIL) for ; Mon, 6 Aug 2012 11:21:55 -0700 (PDT) Received: (from phils@localhost) by phils-poker.wrs.com (8.14.5/8.14.5/Submit) id q76ILriG004664 for qemu-devel@nongnu.org; Mon, 6 Aug 2012 11:21:53 -0700 Date: Mon, 6 Aug 2012 11:21:53 -0700 From: Phil Staub Message-ID: <20120806182153.GA4606@windriver.com> References: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: Subject: Re: [Qemu-devel] [PATCH] MIPS: Correct FCR0 initialization Reply-To: Phil.Staub@windriver.com List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On Tue, Jun 12, 2012 at 10:28:14AM -0400, qemu-devel-request@nongnu.org wrote: > Date: Tue, 12 Jun 2012 07:14:45 -0700 > From: Richard Henderson > To: "Maciej W. Rozycki" > Cc: qemu-devel@nongnu.org, Aurelien Jarno > Subject: Re: [Qemu-devel] [PATCH] MIPS: Correct FCR0 initialization > Message-ID: <4FD74ED5.9010604@twiddle.net> > Content-Type: text/plain; charset=ISO-8859-1 > > On 2012-06-07 18:04, Maciej W. Rozycki wrote: > > I have verified this change with system emulation running the GDB test > > suite for the mips-sde-elf target (o32, big endian, 24Kf CPU emulated), > > there were 55 progressions and no regressions. > > > > Signed-off-by: Maciej W. Rozycki > > --- > > > > Sent on behalf of Nathan, who's since left the company. Please apply. > > > > Maciej > > > > qemu-mips-fcr0.diff > > Index: qemu-git-trunk/target-mips/translate.c > > =================================================================== > > --- qemu-git-trunk.orig/target-mips/translate.c 2012-06-04 05:35:53.245610241 +0100 > > +++ qemu-git-trunk/target-mips/translate.c 2012-06-04 05:39:26.245563823 +0100 > > @@ -12776,6 +12776,7 @@ void cpu_state_reset(CPUMIPSState *env) > > env->CP0_SRSConf3 = env->cpu_model->CP0_SRSConf3; > > env->CP0_SRSConf4_rw_bitmask = env->cpu_model->CP0_SRSConf4_rw_bitmask; > > env->CP0_SRSConf4 = env->cpu_model->CP0_SRSConf4; > > + env->active_fpu.fcr0 = env->cpu_model->CP1_fcr0; > > Reviewed-by: Richard Henderson > > > r~ What are the plans for this patch? It doesn't appear to have been applied in any of the repository branches. Thanks, Phil -- Phil Staub, Senior Member of Technical Staff, Wind River Direct: 702.290.0470 Fax: 702.982.0085