* [Qemu-devel] [PATCH] [MIPS] Fix operands of RECIP2.S and RECIP2.PS
@ 2012-08-27 8:50 Richard Sandiford
2012-08-27 9:07 ` Stefan Hajnoczi
2012-08-27 10:20 ` Aurelien Jarno
0 siblings, 2 replies; 3+ messages in thread
From: Richard Sandiford @ 2012-08-27 8:50 UTC (permalink / raw)
To: qemu-devel
Read the second input operand of RECIP2.S and RECIP2.PS from FT rather
than FD. RECIP2.D is already correct.
Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com>
---
target-mips/translate.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 7104d30..d812986 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -6805,7 +6805,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i32 fp1 = tcg_temp_new_i32();
gen_load_fpr32(fp0, fs);
- gen_load_fpr32(fp1, fd);
+ gen_load_fpr32(fp1, ft);
gen_helper_float_recip2_s(fp0, fp0, fp1);
tcg_temp_free_i32(fp1);
gen_store_fpr32(fp0, fd);
@@ -7543,7 +7543,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
TCGv_i64 fp1 = tcg_temp_new_i64();
gen_load_fpr64(ctx, fp0, fs);
- gen_load_fpr64(ctx, fp1, fd);
+ gen_load_fpr64(ctx, fp1, ft);
gen_helper_float_recip2_ps(fp0, fp0, fp1);
tcg_temp_free_i64(fp1);
gen_store_fpr64(ctx, fp0, fd);
--
1.7.7.6
^ permalink raw reply related [flat|nested] 3+ messages in thread* Re: [Qemu-devel] [PATCH] [MIPS] Fix operands of RECIP2.S and RECIP2.PS
2012-08-27 8:50 [Qemu-devel] [PATCH] [MIPS] Fix operands of RECIP2.S and RECIP2.PS Richard Sandiford
@ 2012-08-27 9:07 ` Stefan Hajnoczi
2012-08-27 10:20 ` Aurelien Jarno
1 sibling, 0 replies; 3+ messages in thread
From: Stefan Hajnoczi @ 2012-08-27 9:07 UTC (permalink / raw)
To: qemu-devel, rdsandiford, Aurelien Jarno
On Mon, Aug 27, 2012 at 9:50 AM, Richard Sandiford
<rdsandiford@googlemail.com> wrote:
> Read the second input operand of RECIP2.S and RECIP2.PS from FT rather
> than FD. RECIP2.D is already correct.
>
> Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com>
> ---
> target-mips/translate.c | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 7104d30..d812986 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -6805,7 +6805,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
> TCGv_i32 fp1 = tcg_temp_new_i32();
>
> gen_load_fpr32(fp0, fs);
> - gen_load_fpr32(fp1, fd);
> + gen_load_fpr32(fp1, ft);
> gen_helper_float_recip2_s(fp0, fp0, fp1);
> tcg_temp_free_i32(fp1);
> gen_store_fpr32(fp0, fd);
> @@ -7543,7 +7543,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
> TCGv_i64 fp1 = tcg_temp_new_i64();
>
> gen_load_fpr64(ctx, fp0, fs);
> - gen_load_fpr64(ctx, fp1, fd);
> + gen_load_fpr64(ctx, fp1, ft);
> gen_helper_float_recip2_ps(fp0, fp0, fp1);
> tcg_temp_free_i64(fp1);
> gen_store_fpr64(ctx, fp0, fd);
> --
> 1.7.7.6
CCing Aurelian for MIPS. You can look at ./MAINTAINERS to see who
should be CCed.
Stefan
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [Qemu-devel] [PATCH] [MIPS] Fix operands of RECIP2.S and RECIP2.PS
2012-08-27 8:50 [Qemu-devel] [PATCH] [MIPS] Fix operands of RECIP2.S and RECIP2.PS Richard Sandiford
2012-08-27 9:07 ` Stefan Hajnoczi
@ 2012-08-27 10:20 ` Aurelien Jarno
1 sibling, 0 replies; 3+ messages in thread
From: Aurelien Jarno @ 2012-08-27 10:20 UTC (permalink / raw)
To: qemu-devel, rdsandiford
On Mon, Aug 27, 2012 at 09:50:38AM +0100, Richard Sandiford wrote:
> Read the second input operand of RECIP2.S and RECIP2.PS from FT rather
> than FD. RECIP2.D is already correct.
>
> Signed-off-by: Richard Sandiford <rdsandiford@googlemail.com>
> ---
> target-mips/translate.c | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index 7104d30..d812986 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -6805,7 +6805,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
> TCGv_i32 fp1 = tcg_temp_new_i32();
>
> gen_load_fpr32(fp0, fs);
> - gen_load_fpr32(fp1, fd);
> + gen_load_fpr32(fp1, ft);
> gen_helper_float_recip2_s(fp0, fp0, fp1);
> tcg_temp_free_i32(fp1);
> gen_store_fpr32(fp0, fd);
> @@ -7543,7 +7543,7 @@ static void gen_farith (DisasContext *ctx, enum fopcode op1,
> TCGv_i64 fp1 = tcg_temp_new_i64();
>
> gen_load_fpr64(ctx, fp0, fs);
> - gen_load_fpr64(ctx, fp1, fd);
> + gen_load_fpr64(ctx, fp1, ft);
> gen_helper_float_recip2_ps(fp0, fp0, fp1);
> tcg_temp_free_i64(fp1);
> gen_store_fpr64(ctx, fp0, fd);
Thanks, applied.
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 3+ messages in thread
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2012-08-27 8:50 [Qemu-devel] [PATCH] [MIPS] Fix operands of RECIP2.S and RECIP2.PS Richard Sandiford
2012-08-27 9:07 ` Stefan Hajnoczi
2012-08-27 10:20 ` Aurelien Jarno
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