From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:49640) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TB3fO-0004cj-Lv for qemu-devel@nongnu.org; Mon, 10 Sep 2012 09:04:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TB3fI-0004FL-PB for qemu-devel@nongnu.org; Mon, 10 Sep 2012 09:04:42 -0400 Received: from mx1.redhat.com ([209.132.183.28]:40653) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TB3fI-0004FA-Fq for qemu-devel@nongnu.org; Mon, 10 Sep 2012 09:04:36 -0400 Date: Mon, 10 Sep 2012 15:04:30 +0200 From: Igor Mammedov Message-ID: <20120910150430.7a425e92@nial.usersys.redhat.com> In-Reply-To: <20120910143149.500ba268@nial.usersys.redhat.com> References: <1346877673-9136-1-git-send-email-ehabkost@redhat.com> <1346877673-9136-5-git-send-email-ehabkost@redhat.com> <20120910141838.19636d67@nial.usersys.redhat.com> <20120910143149.500ba268@nial.usersys.redhat.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 4/7] move CPU models from cpus-x86_64.conf to C List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Mammedov Cc: Peter Maydell , Andreas =?ISO-8859-1?B?RuRyYmVy?= , Eduardo Habkost , Anthony Liguori , qemu-devel@nongnu.org On Mon, 10 Sep 2012 14:31:49 +0200 Igor Mammedov wrote: > On Mon, 10 Sep 2012 14:18:38 +0200 > Igor Mammedov wrote: > > > On Wed, 5 Sep 2012 17:41:10 -0300 > > Eduardo Habkost wrote: > > > > > Those models are maintained by QEMU and may require compatibility code > > > to be added when making some changes. Keeping the data in the C source > > > code should make it simpler to handle those details. > > > > > > Signed-off-by: Eduardo Habkost > > > --- > > > sysconfigs/target/cpus-x86_64.conf | 129 +--------------------- > > > target-i386/cpu.c | 219 > > > +++++++++++++++++++++++++++++++++++++ 2 files changed, 220 > > > insertions(+), 128 deletions(-) > > > > > > diff --git a/sysconfigs/target/cpus-x86_64.conf > > > b/sysconfigs/target/cpus-x86_64.conf index cee0ea9..3902189 100644 > > > --- a/sysconfigs/target/cpus-x86_64.conf > > > +++ b/sysconfigs/target/cpus-x86_64.conf > > > @@ -1,128 +1 @@ > > > -# x86 CPU MODELS > > > - > > > -[cpudef] > > > - name = "Conroe" > > > - level = "2" > > > - vendor = "GenuineIntel" > > > - family = "6" > > > - model = "2" > > > - stepping = "3" > > > - feature_edx = "sse2 sse fxsr mmx clflush pse36 pat cmov mca pge mtrr > > > sep apic cx8 mce pae msr tsc pse de fpu" > > > - feature_ecx = "ssse3 sse3" > > > - extfeature_edx = "i64 xd syscall" > > ... > > > + .ext2_features = CPUID_EXT2_LM | CPUID_EXT2_NX | > > > CPUID_EXT2_SYSCALL, > > Silent fix, replacing i64 with CPUID_EXT2_LM > > looks like "i64" is mistake and never worked. In Intel & AMD cpuid guides > Actually it works when setting feature fields because it uses > setfeatures(), however setting i64 will set wrong bit if it's set using > add_flagname_to_bitmaps() I'm wrong, and sorry for noise. I mixed up ia64 from feature_name with i64 from ext2_feature_name. But question unrelated to this patch is still stand if ia64 is valid bit for 01.EDX[30]?